SST26WF064C 1.8V, 64 Mbit Serial Quad I/O (SQI) Flash Memory Software Protection Features - Individual-Block Write Protection with permanent Single Voltage Read and Write Operations lock-down capability - 1.65-1.95V - 64 KByte blocks, two 32 KByte blocks, and Serial Interface Architecture eight 8 KByte parameter blocks - Mode 0 and Mode 3 - Read Protection on top and bottom 8 KByte - Nibble-wide multiplexed I/Os with SPI-like serial parameter blocks command structure Security ID - x1/x2/x4 Serial Peripheral Interface (SPI) Protocol - One-Time Programmable (OTP) 2 KByte, - Dual-Transfer Rate (DTR) Operation Secure ID High Speed Clock Frequency - 64 bit unique, factory pre-programmed identifier - 104 MHz max - User-programmable area Temperature Range - 54 MHz max (DTR) Burst Modes - Industrial: -40C to +85C Packages Available - Continuous linear burst - 8/16/32/64 Byte linear burst with wrap-around - 8-contact WDFN (6mm x 5mm) - 8-lead SOIJ (5.28 mm) Superior Reliability - 16-lead SOIC (7.50 mm) - Endurance: 100,000 Cycles (min) - 24-ball TBGA (8mm x 6mm) - Greater than 100 years Data Retention All devices are RoHS compliant Low Power Consumption: - Active Read current: 15 mA (typical 104 MHz) Product Description - Standby current: 10 A (typical) - Deep Power-Down current: 2.5 A (typical) The Serial Quad I/O (SQI) family of flash-memory Fast Erase Time devices features a six-wire, 4-bit I/O interface that allows for low-power, high-performance operation in a - Sector/Block Erase: 18 ms (typ), 25 ms (max) low pin-count package. The SST26WF064C also sup- - Chip Erase: 35 ms (typ), 50 ms (max) ports full command-set compatibility to traditional Serial Page-Program Peripheral Interface (SPI) protocol. System designs - 256 Bytes per page in x1 or x4 mode using SQI flash devices occupy less board space and End-of-Write Detection ultimately lower system costs. - Software polling the BUSY bit in status register All members of the 26 Series, SQI family are manufac- Flexible Erase Capability tured with proprietary, high-performance CMOS Super- - Uniform 4 KByte sectors Flash technology. The split-gate cell design and thick- - Four 8 KByte top and bottom parameter overlay oxide tunneling injector attain better reliability and man- blocks ufacturability compared with alternate approaches. - One 32 KByte top and bottom overlay block The SST26WF064C significantly improves performance - Uniform 64 KByte overlay blocks and reliability, while lowering power consumption. These Write-Suspend devices write (Program or Erase) with a single power sup- - Suspend Program or Erase operation to access ply of 1.65-1.95V. The total energy consumed is a function another block/sector of the applied voltage, current, and time of application. For any given voltage range, the SuperFlash technology uses Software Reset (RST) mode less current to program and has a shorter erase time. Hardware Reset Pin Therefore, the total energy consumed during any Erase or Supports JEDEC-compliant Serial Flash Discov- Program operation is less than alternative flash memory erable Parameter (SFDP) table technologies. 2016-2017 Microchip Technology Inc. Preliminary DS20005430B-page 1SST26WF064C The SST26WF064C is offered in 8-contact WDFN See I/O Configuration (IOC) on page 13 for more (6 mm x 5 mm), 8-lead SOIJ (5.28 mm), 16-lead SOIC information about configuring the WP , RESET/ (7.50 mm), and 24-ball TBGA (8mm x 6mm) packages. HOLD , SIO2, and SIO3 pins. See Figure 2-1 for pin assignments. The following configuration is available upon order: SST26WF064C default at power-up has the WP and RESET /HOLD pins enabled, with the SIO2 and SIO3 pins disabled, to initiate SPI-protocol. TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors microchip.com. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: