SST38VF6401B / SST38VF6402B SST38VF6403B / SST38VF6404B 64 Mbit (x16) Advanced Multi-Purpose Flash Plus JEDEC Standard Features - Flash EEPROM Pinouts and command sets Organized as 4M x16 CFI Compliant Single Voltage Read and Write Operations Packages Available - 2.7-3.6V - 48-lead TSOP Superior Reliability - 48-ball TFBGA - Endurance: 100,000 Cycles minimum All non-Pb (lead-free) devices are RoHS compliant - Greater than 100 years Data Retention Low Power Consumption (typical values at 5 MHz) Description - Active Current: 25 mA (typical) The SST38VF6401B, SST38VF6402B, SST38VF6403B, - Standby Current: 5 A (typical) and SST38VF6404B devices are 4M x16 CMOS - Auto Low Power Mode: 5 A (typical) Advanced Multi-Purpose Flash Plus (Advanced MPF+) 128-bit Unique ID manufactured with Microchip proprietary, high-perfor- Security-ID Feature mance CMOS SuperFlash technology. The split-gate cell - 248 Word, user One-Time-Programmable design and thick-oxide tunneling injector attain better reli- Protection and Security Features ability and manufacturability compared with alternate approaches. The SST38VF6401B/6402B/6403B/6404B - Hardware Boot Block Protection/WP Input Pin, write (Program or Erase) with a 2.7-3.6V power supply. Uniform (32 KWord), and Non-Uniform These devices conform to JEDEC standard pin assign- (8 KWord) options available ments for x16 memories. - User-controlled individual block (32 KWord) pro- tection, using software only methods Featuring high performance Word-Program, the - Password protection SST38VF6401B/6402B/6403B/6404B provide a typical Hardware Reset Pin (RST ) Word-Program time of 7 sec. For faster word-pro- gramming performance, the Write-Buffer Programming Fast Read and Page Read Access Times: feature, has a typical word-program time of 1.75 sec. - 70 ns Read access time These devices use Toggle Bit, Data Polling, or the RY/ - 25 ns Page Read access times BY pin to indicate Program operation completion. In - 8-Word Page Read buffer addition to single-word Read, Advanced MPF+ devices Latched Address and Data provide a Page-Read feature that enables a faster Fast Erase Times: word read time of 25 ns, eight words on the same page. - Block-Erase Time: 18 ms (typical) To protect against inadvertent write, the - Chip-Erase Time: 40 ms (typical) SST38VF6401B/6402B/6403B/6404B have on-chip Erase-Suspend/-Resume Capabilities hardware and Software Data Protection schemes. Designed, manufactured, and tested for a wide spec- Fast Word and Write-Buffer Programming Times: trum of applications, these devices are available with - Word-Program Time: 7 s (typical) 100,000 cycles minimum endurance. Data retention is - Write Buffer Programming Time: 1.75 s / Word rated at greater than 100 years. (typical) The SST38VF6401B/6402B/6403B/6404B are suited for - 16-Word Write Buffer applications that require the convenient and economi- Automatic Write Timing cal updating of program, configuration, or data mem- - Internal V Generation PP ory. For all system applications, Advanced MPF+ End-of-Write Detection significantly improve performance and reliability, while - Toggle Bits lowering power consumption. These devices inherently - Data Polling use less energy during Erase and Program than alter- - RY/BY Output native flash technologies. The total energy consumed is a function of the applied voltage, current, and time of CMOS I/O Compatibility application. For any given voltage range, the Super- Flash technology uses less current to program and has 2013 Microchip Technology Inc. Preliminary DS20005002D-page 1SST38VF6401B / SST38VF6402B / SST38VF6403B / SST38VF6404B a shorter erase time therefore, the total energy con- The SST38VF6401B/6402B/6403B/6404B also offer sumed during any Erase or Program operation is less flexible data protection features. Applications that than alternative flash technologies. require memory protection from program and erase operations can use the Boot Block, Individual Block These devices also improve flexibility while lowering Protection, and Advanced Protection features. For the cost for program, data, and configuration storage applications that require a permanent solution, the Irre- applications. The SuperFlash technology provides versible Block Locking feature provides permanent fixed Erase and Program times, independent of the protection for memory blocks. number of Erase/Program cycles that have occurred. Therefore, the system software or hardware does not To meet high-density, surface mount requirements, the have to be modified or de-rated as is necessary with SST38VF6401B/6402B/6403B/6404B devices are alternative flash technologies, whose Erase and Pro- offered in 48-lead TSOP and 48-ball TFBGA packages. gram times increase with accumulated Erase/Program See Figures 2-1 and for pin assignments and Table 2- cycles. 1 for pin descriptions. TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. 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