SST39VF1601C/SST39VF1602C 16 Mbit (x16) Multi-Purpose Flash Plus The SST39VF1601C / SST39VF1602C devices are 1M x16 CMOS Multi-Purpose Flash Plus (MPF+) manufactured with SST proprietary, high performance CMOS SuperFlash technology. The split-gate cell design and thick-oxide tunneling injec- tor attain better reliability and manufacturability compared with alternate approaches. The SST39VF1601C / SST39VF1602C write (Program or Erase) with a 2.7-3.6V power supply. These devices conform to JEDEC standard pin- outs for x16 memories. - Data Polling 1.0 FEATURES - Ready/Busy Pin Organized as 1M x16: SST39VF1601C/1602C CMOS I/O Compatibility Single Voltage Read and Write Operations JEDEC Standard - 2.7-3.6V - Flash EEPROM Pinouts and command sets Superior Reliability Packages Available - Endurance: 100,000 Cycles (Typical) - 48-lead TSOP (12mm x 20mm) - Greater than 100 years Data Retention - 48-ball TFBGA (6mm x 8mm) Low Power Consumption (typical values at 5 - 48-ball WFBGA (4mm x 6mm) MHz) All devices are RoHS compliant - Active Current: 9 mA (typical) - Standby Current: 3 A (typical) 2.0 PRODUCT DESCRIPTION - Auto Low Power Mode: 3 A (typical) Hardware Block-Protection/WP Input Pin The SST39VF1601C and SST39VF1602C devices are 1M x16 CMOS Multi-Purpose Flash Plus (MPF+) man- - Top Block-Protection (top 8 KWord) ufactured with SST proprietary, high performance - Bottom Block-Protection (bottom 8 KWord) CMOS SuperFlash technology. The split-gate cell Sector-Erase Capability design and thick-oxide tunneling injector attain better - Uniform 2 KWord sectors reliability and manufacturability compared with alter- Block-Erase Capability nate approaches. The SST39VF160xC writes (Pro- - Flexible block architecture one 8-, two 4-, one gram or Erase) with a 2.7-3.6V power supply. These 16-, and thirty one 32-KWord blocks devices conform to JEDEC standard pinouts for x16 Chip-Erase Capability memories. Erase-Suspend/Erase-Resume Capabilities Featuring high performance Word-Program, the Hardware Reset Pin (RST ) SST39VF1601C/1602C devices provide a typical Word-Program time of 7 sec. These devices use Tog- Latched Address and Data gle Bit, Data Polling, or the RY/BY pin to indicate the Security-ID Feature completion of Program operation. To protect against - SST: 128 bits User: 128 words inadvertent write, they have on-chip hardware and Fast Read Access Time: Software Data Protection schemes. Designed, manu- - 70 ns factured, and tested for a wide spectrum of applica- tions, these devices are offered with a guaranteed Fast Erase and Word-Program: typical endurance of 100,000 cycles. Data retention is - Sector-Erase Time: 18 ms (typical) rated at greater than 100 years. - Block-Erase Time: 18 ms (typical) - Chip-Erase Time: 40 ms (typical) The SST39VF1601C/1602C devices are suited for applications that require convenient and economical - Word-Program Time: 7 s (typical) updating of program, configuration, or data memory. Automatic Write Timing For all system applications, they significantly improve - Internal V Generation PP performance and reliability, while lowering power End-of-Write Detection consumption. They inherently use less energy during - Toggle Bits 2015-2018 Microchip Technology Inc. DS20005018B-page 1SST39VF1601C/SST39VF1602C Erase and Program than alternative flash technologies. The total energy consumed is a function of the applied voltage, current, and time of application. Since for any given voltage range, the SuperFlash technology uses less current to program and has a shorter erase time, the total energy consumed during any Erase or Pro- gram operation is less than alternative flash technolo- gies. These devices also improve flexibility while lowering the cost for program, data, and configuration storage applications. The SuperFlash technology provides fixed Erase and Program times, independent of the number of Erase/ Program cycles that have occurred. Therefore the sys- tem software or hardware does not have to be modified or de-rated as is necessary with alternative flash tech- nologies, whose Erase and Program times increase with accumulated Erase/Program cycles. To meet high density, surface mount requirements, the SST39VF1601C/1602C are offered in 48-lead TSOP, 48-ball TFBGA, and 48-ball WFBGA packages. See Figures 4-1, 4-2, and 4-3 for pin assignments. TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors microchip.com. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: