NOT RECOMMENDED FOR NEW DESIGNS SY89809L 3.3V 1:9 High-Performance, Low-Voltage Bus Clock Driver General Description The SY89809L is a High-Performance Bus Clock Driver with 9 differential HSTL (High-Speed Transceiver Logic) Precision Edge output pairs. The part is designed for use in low-voltage Features (3.3V/1.8V) applications, which require a large number of outputs to drive precisely aligned, ultra-low skew signals to 3.3V core supply, 1.8V output supply for reduced power their destination. The input is multiplexed from either HSTL LVPECL and HSTL inputs or LVPECL (Low-Voltage Positive-Emitter-Coupled Logic) 9 differential HSTL (low-voltage swing) output pairs by the CLK SEL pin. The Output Enable (OE) is HSTL outputs drive 50 -to-ground with no offset voltage synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. 500MHz maximum clock frequency This avoids any chance of generating a runt clock pulse Low part-to-part skew (200ps max.) when the device is enabled/disabled as can happen with Low pin-to-pin skew (50ps max.) an asynchronous control. Available in 32-pin TQFP The SY89809L features low pin-to-pin skew (50ps max.) and low part-to-part skew (200ps max.)performance Applications previously unachievable in a standard product having such a high number of outputs. The SY89809L is available in a High-performance PCs single space saving package, enabling a lower overall cost Workstations solution. Parallel processor-based systems Datasheets and support documentation can be found on Other high-performance computing Micrels web site at: www.micrel.com. Communications Level Direction Signal Logic Symbol HSTL Input HSTL CLK, /HSTL CLK HSTL Output Q0 Q8, /Q0 /Q8 LVPECL Input LVPECL CLK, /LVPECL CLK LVCMOS/LVTTL Input CLK SEL, OE Table 1. Signal Groups (1) OE CLK SEL Q0 Q8 /Q0 /Q8 0 0 LOW HIGH 0 1 LOW HIGH 1 0 HSTL CLK /HSTL CLK 1 1 LVPECL CLK /LVPECL CLK Table 2. Truth Table Note: 1. The OE (output enable) signal is synchronized with the low level of the HSTL CLK and LVPECL CLK signal. Precision Edge is a registered trademark of Micrel, Inc. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. SY89809L (1) Ordering Information Package Operating Lead Part Number Package Marking Type Range Finish SY89809LTC T32-1 Commercial SY89809LTC Sn-Pb (2) SY89809LTCTR T32-1 Commercial SY89809LTC Sn-Pb (3) SY89809LTH with Pb-Free NiPdAu SY89809LTH T32-1 Commercial bar-line indicator Pb-Free (2, 3) SY89809LTHTR T32-1 Commercial SY89809LTH with Pb-Free NiPdAu bar-line indicator Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25C, DC Electricals only. A 2. Tape and Reel. 3. Pb-Free package is recommended for new designs. Pin Configuration 32-Pin TQFP (T32-1) M9999-121409-D December 2009 2 hbwhelp micrel.com or (408) 955-1690