MT41K512M16HA-125 AIT:A Micron

TN-41-17: DDR3L MT41K512M16 SDP to DDP Migration Guide Introduction Technical Note Transitioning Designs From DDR3 8Gb SDP 1CS to 8Gb DDP 1CS Introduction This technical note explains how to migrate a PCB design that uses a Micron 8Gb DDR3L product from a 90 series single-die 96-ball package to a 100 series dual-die 96- ball package. For complete specifications, see the data sheet for each device. This technical note does not include memory controller firmware changes required to move from the single-die package (SDP) to the dual-die package (DDP). Customers are advised to resimulate the system for signal integrity (SI) confirmation. The following table shows the single-die and dual-die part numbers and essential dif- ferences between the devices. Table 1: DDR3L Device Details Device MT41K512M16VRN (DDP), Architecture MT41K512M16HA (SDP) MT41K512M16VRP (DDP) Die configuration 64 Meg x 16 x 8 banks 64 Meg x 8 x 8 banks Density per package 8Gb 8Gb Die per package 1 2 Ranks (CS n) 1 1 Refresh count 8K 8K Row address A 15:0 A 15:0 Bank address BA 2:0 BA 2:0 Column address A 9:0 A 9:0 Page size/die 2KB 1KB Ball Assignments Ballout and assignments are the same for the 8Gb DDR3L SDP and DDP devices how- ever, when replacing an SDP device with a DDP device on the same system board, we recommend resimulating the system and verifying all termination settings and values. A system firmware change to adjust the controller and DRAM DQ/DQS drive strength may be required depending on system SI simulation results. For information on how to help verify these design changes and confirm SI, see Micron technical notes TN-41-13: Point to Point Design Support and TN-52-02: Point-to-Point System Design Layout and Routing Tips. CCM005-524338224-10531 Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 tn4117 ddr3l sdp to ddp.pdf - Rev. B 02/20 EN 2018 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.TN-41-17: DDR3L MT41K512M16 SDP to DDP Migration Guide Block Diagrams Block Diagrams The block diagrams for the 8Gb DDR3L SDP and the DDP devices are shown in the fig- ures below. Note that the DDP package has one internal RZQ resister and one ZQ pin out. External ballouts for both the SDP and DDP packages are the same. Figure 1: Functional Block Diagram for 8Gb 1CS SDP (64 Meg x 16 x 8 Banks) (64 Meg x 16 x 8 banks) CS CK RAS CKE CK CAS A 15:0 , ODT BA 2:0 WE ZQ DQ 15:0 LDQS/LDQS ,UDQS/UDQS LDM/UDM Figure 2: Functional Block Diagram for 8Gb 1CS DDP (2 x 64 Meg x 8 x 8 Banks) Die2 Byte 0 (64 Meg x 8 x 8 banks) Die1 Byte 1 RZQ (64 Meg x 8 x 8 banks) V SSQ ZQ CK CS LDM UDM RAS CK A 15:0 , BA 2:0 CAS CKE WE DQ 7:0 ODT DQ 15:8 LDQS UDQS UDQS LDQS CCM005-524338224-10531 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2 tn4117 ddr3l sdp to ddp.pdf - Rev. B 02/20 EN 2018 Micron Technology, Inc. All rights reserved.