Micron Confidential and Proprietary 4GB, 8GB: eMMC Features eMMC Memory MTFC4GACAAAM-4M IT, MTFC8GACAAAM-4M IT Figure 1: Micron eMMC Device Features MultiMediaCard (MMC) controller and NAND Flash 153-ball VFBGA (RoHS compliant,gree package) V : 2.73.6V CC V (dual voltage): 1.651.95V 2.73.6V CCQ MMC MMC Temperature ranges MMC controller power interface Operating temperature: 40C to +85C Storage temperature: 40C to +85C MMC-Specific Features JEDEC/MMC standard version 4.51-compliant NAND Flash NAND Flash (JEDEC Standard No. 84-B451) SPI mode not power supported 1 Advanced 11-signal interface x1, x4, and x8 I/Os, selectable by host SDR/DDR modes up to 52 MHz clock speed HS200 mode Real-time clock Command classes: class 0 (basic) class 2 (block MMC-Specific Features (Continued) read) class 4 (block write) class 5 (erase) Background operation class 6 (write protection) class 7 (lock card) Reliable write Temporary write protection Discard and sanitize Boot operation (high-speed boot) Extended partitioning Sleep mode Context ID Replay-protected memory block (RPMB) Data TAG Secure erase and secure trim Packed commands Hardware reset signal Dynamic device capacity Multiple partitions with enhanced attribute Backward compatible with previous MMC Permanent and power-on write protection Thermal specification High-priority interrupt (HPI) Cache ECC and block management implemented Note: 1. The JEDEC specification is available at www.jedec.org/sites/default/files/docs/ JESD84-B451.pdf. PDF: 09005aef856e6fe7 Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 emmc ps8210 v451 80s 153b it.pdf - Rev. E 6/14 EN 2013 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.Micron Confidential and Proprietary 4GB, 8GB: eMMC Features eMMC Performance and Current Consumption Table 1: MLC Partition Performance Typical Values 1 Condition 4GB 8GB Unit Sequential Write 11 24 MB/s Sequential Read 80 120 MB/s Random Write 1000 1000 IOPS Random Read 4000 4000 IOPS Note: 1. Bus in x8 I/O and HS200 modes. Sequential access of 1MB chunk random access of 4KB chunk over 1GB span. Additional performance data, such as system performance on a specific application board, will be provided in a separate document upon customer request. Table 2: 52 MHz DDR2 Performance Typical Values 1 Condition 4GB 8GB Unit Sequential Write 11 24 MB/s Sequential Read 75 80 MB/s Random Write 1000 1000 IOPS Random Read 3800 3800 IOPS Note: 1. Bus in x8 I/O and 52 MHz DDR2 modes. Sequential access of 1MB chunk random access of 4KB chunk over 1GB span. Additional performance data, such as system performance on a specific application board, will be provided in a separate document upon customer request. Table 3: Current Consumption Typical Values (I /I ) CC CCQ 1 Condition 4GB 8GB Unit Write 50/20 60/20 mA Read 60/60 60/60 mA Sleep 0/180 0/180 uA Auto-Standby 25/150 50/180 uA Note: 1. Bus in x8 I/O and HS200 modes. V = 3.6V and V = 1.95V. 25C. Measurements done as average RMS cur- CC CCQ rent consumption. I in READ operation might be affected by tester load. CCQ PDF: 09005aef856e6fe7 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2 emmc ps8210 v451 80s 153b it.pdf - Rev. E 6/14 EN 2013 Micron Technology, Inc. All rights reserved.