MP5001DQ-LF-P Monolithic Power Systems

MP5001 5V, 1A- 5A Programmable Current Limit Switch The Future of Analog IC Technology DESCRIPTION FEATURES The MP5001 is a protection device designed to Integrated 44m Power FET withstand 20V protect circuitry on the output (source) from Enable/Fault Pin transients on input (V ). It also protects V from CC CC Adjustable Slew Rate for Output Voltage undesired shorts and transients coming from the Adjustable Current Limit source. Thermal Protection Over Voltage Limit At start up, inrush current is limited by limiting the slew rate at the source. The slew rate is APPLICATIONS controlled by a small capacitor at the dv/dt pin. Hot Swap The dv/dt pin has an internal circuit that allows the customer to float this pin (no connect) and PC Cards still receive a 1.1ms ramp time at the source. Cell Phones Laptops The max load at the output (source) is current limited. This is accomplished by utilizing a sense MPS and The Future of Analog IC Technology are Registered Trademarks of Monolithic Power Systems, Inc. FET topology. The magnitude of the current limit is controlled by an external resistor from the I- Limit pin to the Source pin. An internal charge pump drives the gate of the power device, allowing a very low on-resistance DMOS power FET of just 44m. The source is protected from the V input being CC too low or too high. Under Voltage Lockout (UVLO) assures that V is above the minimum CC operating threshold, before the power device is turned on. If V goes above the high output CC threshold, the source voltage will be limited. TYPICAL APPLICATION R LIMIT VIN 11 VCC 6 5 N/C Source VOUT 4 7 I-Limit Source MP5001 8 3 EN Enable/Fault Source 2 9 dv/dt Source C dv/dt 10 1 GND Source MP5001 Rev.0.94 www.MonolithicPower.com 1 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. 2014 MPS. All Rights Reserved. MP5001 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (T ) A MP5001DQ QFN10 (3x3) W5 -40C to +85C * For Tape & Reel, add suffix Z (e.g. MP5001DQZ) For RoHS Compliant Packaging, add suffix LF (e.g. MP5001DQLFZ) PACKAGE REFERENCE 1 10 2 9 3 8 4 7 5 6 (1) (3) ABSOLUTE MAXIMUM RATINGS Thermal Resistance JA JC V , SOURCE, I-LIMIT ................................ 22V QFN10 .................................... 50 ...... 12 ... C/W CC dv/dt, ENABLE/FAULT ...................................6V Notes: Junction Temperature.-40 C to +150C 1) Exceeding these ratings may damage the device. (2) Continuous Power Dissipation (T = +25C) A 2) The maximum allowable power dissipation is a function of the maximum junction temperature T(MAX), the junction-to- J .2.5W ambient thermal resistance , and the ambient temperature JA Storage Temperature ............... -65C to +155C T . The maximum allowable continuous power dissipation at A any ambient temperature is calculated by P (MAX)=(T (MAX)- D J Recommended Operating Conditions TA)/ JA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go Input Voltage Operating Range.4V to 10V into thermal shutdown. Internal thermal shutdown circuitry Operating Junct. Temp (T ).-40C to +125C J protects the device from permanent damage. 3) Measured on JESD51-7 4-layer board. MP5001 Rev.0.94 www.MonolithicPower.com 2 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. 2014 MPS. All Rights Reserved.