74AVC2T45-Q100 Dual-bit, dual-supply voltage level translator/transceiver 3-state Rev. 5 4 November 2021 Product data sheet 1. General description The 74AVC2T45-Q100 is a dual-bit, dual-supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual-supply pins (V and V ). Both V and V can be supplied at any voltage CC(A) CC(B) CC(A) CC(B) between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to V and CC(A) pins nB are referenced to V . A HIGH on DIR allows transmission from nA to nB and a LOW on CC(B) DIR allows transmission from nB to nA. The device is fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing any damaging backflow current through the device when it is powered down. In Suspend mode when either V or V are at GND level, both A and B are CC(A) CC(B) in the high-impedance OFF-state. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range: V : 0.8 V to 3.6 V CC(A) V : 0.8 V to 3.6 V CC(B) High noise immunity Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 Class 3B exceeds 8000 V HBM JESD22-A114E Class 3B exceeds 8000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Maximum data rates: 500 Mbit/s (1.8 V to 3.3 V translation) 320 Mbit/s (<1.8 V to 3.3 V translation) 320 Mbit/s (translate to 2.5 V or 1.8 V) 280 Mbit/s (translate to 1.5 V) 240 Mbit/s (translate to 1.2 V) Suspend mode Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFFNexperia 74AVC2T45-Q100 Dual-bit, dual-supply voltage level translator/transceiver 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AVC2T45DP-Q100 -40 C to +125 C TSSOP8 plastic thin shrink small outline package 8 leads SOT505-2 body width 3 mm lead length 0.5 mm 74AVC2T45DC-Q100 -40 C to +125 C VSSOP8 plastic very thin shrink small outline package SOT765-1 8 leads body width 2.3 mm 74AVC2T45GT-Q100 -40 C to +125 C XSON8 plastic extremely thin small outline package SOT833-1 no leads 8 terminals body 1 1.95 0.5 mm 4. Marking Table 2. Marking Type number Marking code 1 74AVC2T45DP-Q100 B45 74AVC2T45DC-Q100 B45 74AVC2T45GT-Q100 B45 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 5 DIR DIR 2 1A 1A 7 1B 1B 3 2A 2A 6 2B 2B V V CC(A) CC(B) V V CC(A) CC(B) 001aag577 001aag578 Fig. 1. Logic symbol Fig. 2. Logic diagram 74AVC2T45 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 5 4 November 2021 2 / 20