74AVCH1T45-Q100 Dual-supply voltage level translator/transceiver 3-state Rev. 3 6 January 2016 Product data sheet 1. General description The 74AVCH1T45-Q100 is a single bit, dual supply transceiver that enables bidirectional level translation. It features two 1-bit input-output ports (A and B), a direction control input (DIR) and dual supply pins (V and V ). Both V and V can be supplied CC(A) CC(B) CC(A) CC(B) with any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins A and DIR are referenced to V and pin B is referenced to V . A HIGH on DIR allows CC(A) CC(B) transmission from A to B and a LOW on DIR allows transmission from B to A. The device is fully specified for partial power-down applications using I . The I OFF OFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either V or V are at CC(A) CC(B) GND level, both A and B are in the high-impedance OFF-state. The 74AVCH1T45-Q100 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Wide supply voltage range: V : 0.8 V to 3.6 V CC(A) V : 0.8 V to 3.6 V CC(B) High noise immunity Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 Class 3B exceeds 8000 V HBM JESD22-A114E Class 3B exceeds 8000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )74AVCH1T45-Q100 Nexperia Dual-supply voltage level translator/transceiver 3-state Maximum data rates: 500 Mbit/s (1.8 V to 3.3 V translation) 320 Mbit/s (< 1.8 V to 3.3 V translation) 320 Mbit/s (translate to 2.5 V or 1.8 V) 280 Mbit/s (translate to 1.5 V) 240 Mbit/s (translate to 1.2 V) Suspend mode Bus hold on data inputs Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AVCH1T45GW-Q100 40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 4. Marking Table 2. Marking 1 Type number Marking code 74AVCH1T45GW-Q100 K5 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 5 ,5 % % 9 9 % 9 9 % DJ D Fig 1. Logic symbol Fig 2. Logic diagram 74AVCH1T45 Q100 All information provided in this document is subject to legal disclaimers Product data sheet Rev. 3 6 January 2016 2 of 21 Nexperia B.V. 2017. All rights reserved DDJ && && && && ,