74AXP1T57GXX Nexperia

74AXP1T57 Dual supply configurable multiple function gate Rev. 5 3 July 2017 Product data sheet 1 General description The 74AXP1T57 is a dual supply configurable multiple function gate with Schmitt-trigger inputs. It features three inputs (A, B and C), an output (Y) and dual supply pins (V and CCI V ). The inputs are referenced to V and the output is referenced to V . All inputs CCO CCI CCO can be connected directly to V or GND. V can be supplied at any voltage between CCI CCI 0.7 V and 2.75 V and V can be supplied at any voltage between 1.2 V and 5.5 V. This CCO feature allows voltage level translation. The 74AXP1T57 can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer. This device ensures very low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using I . The OFF I circuitry disables the output, preventing the potentially damaging backflow current OFF through the device when it is powered down. 2 Features and benefits Wide supply voltage range: V : 0.7 V to 2.75 V CCI V : 1.2 V to 5.5 V CCO Low input capacitance C = 0.6 pF (typical) I Low output capacitance C = 1.8 pF (typical) O Low dynamic power consumption C = 0.6 pF at V = 1.2 V (typical) PD CCI Low dynamic power consumption C = 7.1 pF at V = 3.3 V (typical) PD CCO Low static power consumption I = 0.5 A (85 C maximum) CCI Low static power consumption I = 1.8 A (85 C maximum) CCO High noise immunity Complies with JEDEC standard: JESD8-12A.01 (1.1 V to 1.3 V A, B, C inputs) JESD8-11A.01 (1.4 V to 1.6 V) JESD8-7A (1.65 V to 1.95 V) JESD8-5A.01 (2.3 V to 2.7 V) JESD8-C (2.7 V to 3.6 V Y output) JESD12-6 (4.5 V to 5.5 V Y output) ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV CDM JESD22-C101E exceeds 1000 V Latch-up performance exceeds 100 mA per JESD78D Class II Inputs accept voltages up to 2.75 V Low noise overshoot and undershoot < 10 % of V CCO I circuitry provides partial power-down mode operation OFF Multiple package optionsNexperia 74AXP1T57 Dual supply configurable multiple function gate Specified from -40 C to +85 C 3 Ordering information Table 1.Ordering information Type number Package Temperature Name Description Version range 74AXP1T57DC -40 C to +85 C VSSOP8 plastic very thin shrink small outline package 8 leads SOT765-1 body width 2.3 mm 74AXP1T57GT -40 C to +85 C XSON8 plastic extremely thin small outline package no leads SOT833-1 8 terminals body 1 x 1.95 x 0.5 mm 74AXP1T57GN -40 C to +85 C XSON8 extremely thin small outline package no leads SOT1116 8 terminals body 1.2 x 1.0 x 0.35 mm 74AXP1T57GS -40 C to +85 C XSON8 extremely thin small outline package no leads SOT1203 8 terminals body 1.35 x 1.0 x 0.35 mm 74AXP1T57GX -40 C to +85 C X2SON8 plastic thermal enhanced extremely thin small outline SOT1233 package no leads 8 terminals body 1.35 x 0.8 x 0.35 mm 4 Marking Table 2.Marking 1 Type number Marking code 74AXP1T57DC rD 74AXP1T57GT rD 74AXP1T57GN rD 74AXP1T57GS rD 74AXP1T57GX rD 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5 Functional diagram 2 A 6 2 Y A 3 B 6 Y 3 B 7 C V V CCI CCO 7 C aaa-018525 aaa-018526 Figure 1. Logic symbol Figure 2. Logic diagram 74AXP1T57 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved. Product data sheet Rev. 5 3 July 2017 2 / 24