74AXP2T45 2-bit dual supply translating transceiver 3-state Rev. 1 19 March 2020 Product data sheet 1. General description The 74AXP2T45 is a 2-bit, dual supply transceiver with 3-state outputs that enables bidirectional level translation. It features two 2-bit input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (V and V ). Both V and V can be supplied at any CC(A) CC(B) CC(A) CC(B) voltage between 0.9 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (0.9 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). No power supply sequencing is required and output glitches during power supply transitions are prevented using patented circuitry. As a result glitches will not appear on the outputs for supply transitions during power-up/down between 20 mV/s and 5.5 V/s. Pins A and DIR are referenced to V and pin B is referenced CC(A) to V . A HIGH on DIR allows transmission from A to B and a LOW on DIR allows transmission CC(B) from B to A. The device is fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either V or V are at GND level, both A and B are CC(A) CC(B) in the high-impedance OFF-state. 2. Features and benefits Wide supply voltage range: V : 0.9 V to 5.5 V CC(A) V : 0.9 V to 5.5 V CC(B) Low input capacitance C = 1.4 pF (typical) I Low output capacitance C = 4.4 pF (typical) O Low dynamic power consumption C = 11 pF (typical) PD Low static power consumption I = 2 A (25 C maximum) CC High noise immunity Complies with JEDEC standard: JESD8-12 (1.1 V to 1.3 V inputs) JESD8-11 (1.4 V to 1.6 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD12-6 (4.5 V to 5.5 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV Latch-up performance exceeds 100 mA per JESD78D Class II Inputs accept voltages up to 5.5 V Low noise overshoot and undershoot < 10% of V CCO I circuitry provides partial power-down mode operation OFF Specified from -40 C to +125 CNexperia 74AXP2T45 2-bit dual supply translating transceiver 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AXP2T45DC -40 C to +125 C VSSOP8 plastic very thin shrink small outline package 8 leads SOT765-1 body width 2.3 mm 74AXP2T45GX -40 C to +125 C X2SON8 plastic thermal enhanced extremely thin SOT1233 small outline package no leads 8 terminals body 1.35 0.8 0.35 mm 4. Marking Table 2. Marking Type number Marking code 1 74AXP2T45DC R5 74AXP2T45GX R5 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 5 DIR DIR 2 1A 1A 7 1B 1B 3 2A 2A 6 2B 2B V V CC(A) CC(B) V V CC(A) CC(B) 001aag577 001aag578 Fig. 1. Logic symbol Fig. 2. Logic diagram 74AXP2T45 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 1 19 March 2020 2 / 26