74HC153D Nexperia

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT153 Dual 4-input multiplexer December 1990 Product specication File under Integrated Circuits, IC06Philips Semiconductors Product specication Dual 4-input multiplexer 74HC/HCT153 FEATURES The 74HC/HCT153 have two The logic equations for the outputs identical 4-input multiplexers which are: Non-inverting output select two bits of data from up to four 1Y = 1E.(1I .S .S +1I .S .S + 0 1 0 1 1 0 Separate enable for each output sources selected by common data +1I .S .S +1I .S .S ) 2 1 0 3 1 0 select inputs (S , S ). The two 4-input 0 1 Common select inputs multiplexer circuits have individual 2Y = 2E.(2I .S .S +2I .S .S + 0 1 0 1 1 0 See 253 for 3-state version active LOW output enable inputs (1E, +2I .S .S +2I .S .S ) 2 1 0 3 1 0 Permits multiplexing from n lines to 2E) which can be used to strobe the The 153 can be used to move data 1 line outputs independently. The outputs to a common output bus from a group Enable line provided for cascading (1Y, 2Y) are forced LOW when the of registers. The state of the select (n lines to 1 line) corresponding output enable inputs inputs would determine the particular are HIGH. Output capability: standard register from which the data came. An The 153 is the logic implementation alternative application is a function I category: MSI CC of a 2-pole, 4-position switch, where generator. The device can generate the position of the switch is two functions or three variables. This GENERAL DESCRIPTION determined by the logic levels applied is useful for implementing highly to S and S . irregular random logic. 0 1 The 74HC/HCT153 are high-speed Si-gate CMOS devices and are pin The 153 is similar to the 253 but compatible with low power Schottky has standard outputs. TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = 0 V T =25C t =t = 6 ns amb r f TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC HCT t / t propagation delay C = 15 pF V =5 V PHL PLH L CC 1I , 2I to nY 14 16 ns n n S to nY 15 17 ns n nE to nY 10 11 ns C input capacitance 3.5 3.5 pF I C power dissipation capacitance per multiplexer notes 1 and 2 30 30 pF PD Notes ORDERING INFORMATION 1. C is used to determine the dynamic power dissipation (P in W): PD D 2 2 P =C V f + (C V f ) where: D PD CC i L CC o See 74HC/HCT/HCU/HCMOS Logic Package Information. f = input frequency in MHz i f = output frequency in MHz o C = output load capacitance in pF L V = supply voltage in V CC 2 (C V f ) = sum of outputs L CC o 2. For HC the condition is V = GND to V I CC For HCT the condition is V = GND to V - 1.5 V I CC December 1990 2