74HC194 4-bit bidirectional universal shift register Rev. 4 16 March 2021 Product data sheet 1. General description The 74HC194 is a 4-bit bidirectional universal shift register. The synchronous operation of the device is determined by the mode select inputs (S0, S1). In parallel load mode (S0 and S1 HIGH) data appearing on the D0 to D3 inputs, when S0 and S1 are HIGH, is transferred to the Q0 to Q3 outputs. When S0 is HIGH and S1 is LOW data is entered serially via DSL and shifted from left to right when S0 is LOW and S1 is HIGH data is entered serially via DSR and shifted from right to left. DSR and DSL allow multistage shift right or shift left data transfers without interfering with parallel load operation. If both S0 and S1 are LOW, existing data is retained in a hold mode. Mode select and data inputs are edge-triggered, responding only to the LOW-to-HIGH transition of the clock (CP). Therefore, the only timing restriction is that the mode control and selected data inputs must be stable one set-up time prior to the positive transition of the clock pulse. When LOW, the asynchronous master reset (MR) overrides all other input conditions and forces the Q outputs LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) CMOS input levels Shift-left and shift right capability Synchronous parallel and serial data transfer Easily expanded for both serial and parallel operation Asynchronous master reset Hold (do nothing) mode ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from -40 C to +85 C and -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC194DB -40 C to +125 C SSOP16 plastic shrink small outline package 16 leads SOT338-1 body width 5.3 mmNexperia 74HC194 4-bit bidirectional universal shift register 4. Functional diagram 9 10 2 3 4 5 6 7 DSR D0 D1 D2 D3 DSL S0 S1 9 S0 2 DSR CONTROL LOGIC 10 S1 3 D0 Q0 15 4 D1 Q1 14 5 D2 Q2 13 11 CP 6 D3 Q3 12 FF1 to FF4 1 MR 7 DSL CP MR Q0 Q1 Q2 Q3 15 14 13 12 11 1 aaa-024801 aaa-024802 Fig. 1. Functional diagram Fig. 2. Logic symbol SRG4 11 C4/1 /2 9 0 0 M 10 3 1 2 R 2 1,4D 3 15 3,4D 4 14 3,4D 5 13 3,4D 6 12 3,4D 7 2,4D aaa-024803 Fig. 3. IEC logic symbol 74HC194 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 4 16 March 2021 2 / 14