74HCT259PW-Q100,11 Nexperia

74HC259-Q100 74HCT259-Q100 8-bit addressable latch Rev. 2 2 September 2020 Product data sheet 1. General description The 74HC259-Q100 74HCT259-Q100 is an 8-bit addressable latch. The device features four modes of operation. In the addressable latch mode, data on the D input is written into the latch addressed by the inputs A0 to A3. The addressed latch will follow the data input, non-addressed latches will retain their previous states. In memory mode, all latches retain their previous states and are unaffected by the data or address inputs. In the 3-to-8 decoding or demultiplexing mode, the addressed output follows the D input and all other outputs are LOW. In the reset mode, all outputs are forced LOW and unaffected by the data or address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 2.0 V to 6.0 V Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Combined demultiplexer and 8-bit latch Serial-to-parallel capability Output from each storage bit available Random (addressable) data entry Easily expandable Common reset input Useful as a 3-to-8 active HIGH decoder Input levels: For 74HC259-Q100: CMOS level For 74HCT259-Q100: TTL level ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder jointsNexperia 74HC259-Q100 74HCT259-Q100 8-bit addressable latch 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC259D-Q100 -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HCT259D-Q100 74HC259PW-Q100 -40 C to +125 C TSSOP16 plastic thin shrink small outline package SOT403-1 16 leads body width 4.4 mm 74HCT259PW-Q100 74HC259BQ-Q100 -40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal SOT763-1 enhanced very thin quad flat package no leads 74HCT259BQ-Q100 16 terminals body 2.5 3.5 0.85 mm 4. Functional diagram 13 Z9 15 G8 14 G10 9,10D DX 4 C10 14 1 0 8R 1 0 LE 5 2 4 0 Q0 G 1 7 3 13 5 6 2 D Q1 2 6 7 Q2 7 3 Q3 9 1 9 A0 4 Q4 2 10 10 A1 Q5 5 3 11 A2 11 Q6 12 6 Q7 12 MR 7 15 mna573 mna572 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Q0 4 1 A0 Q1 5 2 A1 Q2 6 1-of-8 DECODER 3 A2 Q3 7 8 LATCHES Q4 9 14 LE Q5 10 15 MR Q6 11 13 D Q7 12 mna571 Fig. 3. Functional diagram 74HC HCT259 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 2 2 September 2020 2 / 17