74ACQ373, 74ACTQ373 Quiet Series Octal Transparent Latch with 3-STATE Outputs
April 2007
74ACQ373, 74ACTQ373
tm
Quiet Series Octal Transparent Latch with 3-STATE
Outputs
Features General Description
I and I reduced by 50% The ACQ/ACTQ373 consists of eight latches with
CC OZ
3-STATE outputs for bus organized system applications.
Guaranteed simultaneous switching noise level and
The latches appear transparent to the data when Latch
dynamic threshold performance
Enable (LE) is HIGH. When LE is LOW, the data satisfy-
Guaranteed pin-to-pin skew AC performance
ing the input timing requirements is latched. Data
Improved latch up immunity
appears on the bus when the Output Enable (OE) is
Eight latches in a single package
LOW. When OE is HIGH, the bus output is in the HIGH
3-STATE outputs drive bus lines or buffer memory
impedance state.
address registers
The ACQ/ACTQ373 utilizes Fairchild Quiet Series
Outputs source/sink 24mA
technology to guarantee quiet output switching and
Faster prop delays than the standard AC/ACT373
improve dynamic threshold performance. features
GTO output control and undershoot corrector in addi-
tion to a split ground bus for superior performance.
Ordering Information
Order Package
Number Number Package Description
74ACQ373SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Body
74ACQ373SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACTQ373SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Body
74ACTQ373SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACQT373QSC MQA20 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number.
Connection Diagram Pin Descriptions
Pin Names Description
D D Data Inputs
0 7
LE Latch Enable Input
Output Enable Input
OE
O O 3-STATE Latch Outputs
0 7
FACT, Quiet Series, FACT Quiet Series, and GTO are trademarks of Fairchild Semiconductor Corporation.
1989 Fairchild Semiconductor Corporation www.fairchildsemi.com
74ACQ373, 74ACTQ373 Rev. 1.374ACQ373, 74ACTQ373 Quiet Series Octal Transparent Latch with 3-STATE Outputs
Logic Symbol Functional Description
The ACQ/ACTQ373 contains eight D-type latches with
3-STATE standard outputs. When the Latch Enable (LE)
input is HIGH, data on the D inputs enters the latches.
n
In this condition the latches are transparent, i.e., a latch
output will change state each time its D input changes.
When LE is LOW, the latches store the information that
was present on the D inputs at setup time preceding the
HIGH-to-LOW transition of LE. The 3-STATE standard
outputs are controlled by the Output Enable (OE) input.
When OE is LOW, the standard outputs are in the
2-state mode. When OE is HIGH, the standard outputs
IEEE/IEC
are in the high impedance mode but this does not inter-
fere with entering new data into the latches.
Truth Table
Inputs Outputs
LE OE D O
n n
X H X Z
H L L L
H L H H
L L X O
0
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
= Previous O before HIGH-to-LOW transition of
O
0 0
Latch Enable
1989 Fairchild Semiconductor Corporation www.fairchildsemi.com
74ACQ373, 74ACTQ373 Rev. 1.3 2