74LV4053D,118 Nexperia

74LV4053 Triple single-pole double-throw analog switch Rev. 8 15 September 2021 Product data sheet 1. General description The 74LV4053 is a triple single-pole double-throw (SPDT) analog switch, suitable for use in 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (Y0 and Y1) and a common input/output (Z). A digital enable input (E) is common to all switches. When E is HIGH, the switches are turned off. Digital inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess V . CC 2. Features and benefits Wide supply voltage range from 1.0 V to 6.0 V Optimized for low-voltage applications: 1.0 V to 3.6 V CMOS low power disssipation Accepts TTL input levels between V = 2.7 V and V = 3.6 V CC CC Low ON resistance: 180 (typical) at V - V = 2.0 V CC EE 100 (typical) at V - V = 3.0 V CC EE 75 (typical) at V - V = 4.5 V CC EE Logic level translation: To enable 3 V logic to communicate with 3 V analog signals Typical break before make built in Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.6 V to 5.5 V) ESD protection: HBM JESD22-A114-C exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 C to +85 C and from -40 C to +125 CNexperia 74LV4053 Triple single-pole double-throw analog switch 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV4053D -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74LV4053PW -40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74LV4053BQ -40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1 very thin quad flat package no leads 16 terminals body 2.5 3.5 0.85 mm 4. Functional diagram E V CC 6 16 13 1Y1 LOGIC S1 11 LEVEL DECODER 12 1Y0 CONVERSION 14 1Z 1 2Y1 LOGIC S2 10 2 2Y0 LEVEL CONVERSION 15 2Z 3 3Y1 LOGIC S3 9 5 3Y0 LEVEL CONVERSION 4 3Z 8 7 GND V 001aak341 EE Fig. 1. Functional diagram 74LV4053 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 15 September 2021 2 / 20