74LVC2GU04GW-Q100, Nexperia

74LVC2GU04-Q100 Dual unbuffered inverter Rev. 5 19 April 2021 Product data sheet 1. General description The 74LVC2GU04-Q100 is a dual unbuffered inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 24 mA output drive (V = 3.0 V) CC CMOS low power consumption Latch-up performance exceeds 250 mA Input accepts voltages up to 5 V Multiple package options 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC2GU04GW-Q100 -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74LVC2GU04GV-Q100 -40 C to +125 C SC-74 TSOP6 plastic surface-mounted package 6 leads SOT457 74LVC2GU04GM-Q100 -40 C to +125 C XSON6 plastic extremely thin small outline SOT886 package no leads 6 terminals body 1 1.45 0.5 mmNexperia 74LVC2GU04-Q100 Dual unbuffered inverter 4. Marking Table 2. Marking codes Type number Marking 1 74LVC2GU04GW-Q100 YD 74LVC2GU04GV-Q100 VU4 74LVC2GU04GM-Q100 YD 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram V V CC CC 1 1A 1Y 6 1 1 6 100 A Y 1 3 2A 2Y 4 3 4 mnb106 mnb107 mna636 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one gate) 6. Pinning information 6.1. Pinning 74LVC2GU04 74LVC2GU04 1A 1 6 1Y 1A 1 6 1Y GND 2 5 V CC GND 2 5 V CC 2A 3 4 2Y 3 4 2A 2Y 001aab681 001aab680 Transparent top view Fig. 4. Pin configuration SOT363 (SC-88) and SOT457 (SC-74 TSOP6) Fig. 5. Pin configuration SOT886 (XSON6) 6.2. Pin description Table 3. Pin description Symbol Pin Description 1A 1 data input GND 2 ground (0 V) 2A 3 data input 2Y 4 data output V 5 supply voltage CC 1Y 6 data output 74LVC2GU04 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 5 19 April 2021 2 / 13