74LVC2T45GD,125 NXP

74LVC2T45 74LVCH2T45 Dual supply translating transceiver 3-state Rev. 11 16 September 2021 Product data sheet 1. General description The 74LVC2T45 74LVCH2T45 are dual bit, dual supply translating transceivers with 3-state outputs that enable bidirectional level translation. They feature two 2-bits input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (V and V ). Both V CC(A) CC(B) CC(A) and V can be supplied at any voltage between 1.2 V and 5.5 V making the device suitable CC(B) for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins nA and DIR are referenced to V and pins nB are referenced to V . A HIGH on DIR CC(A) CC(B) allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA. The devices are fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either V or V are at GND level, both A port and CC(A) CC(B) B port are in the high-impedance OFF-state. Active bus hold circuitry in the 74LVCH2T45 holds unused or floating data inputs at a valid logic level. 2. Features and benefits Wide supply voltage range: V : 1.2 V to 5.5 V CC(A) V : 1.2 V to 5.5 V CC(B) High noise immunity Complies with JEDEC standards: JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V) ESD protection: HBM JESD22-A114F Class 3A exceeds 4000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Maximum data rates: 420 Mbps (3.3 V to 5.0 V translation) 210 Mbps (translate to 3.3 V)) 140 Mbps (translate to 2.5 V) 75 Mbps (translate to 1.8 V) 60 Mbps (translate to 1.5 V) Suspend mode Latch-up performance exceeds 100 mA per JESD 78 Class II 24 mA output drive (V = 3.0 V) CC Inputs accept voltages up to 5.5 V Low power consumption: 16 A maximum I CC I circuitry provides partial Power-down mode operation OFF Multiple package options Specified from -40 C to +85 C and -40 C to +125 CNexperia 74LVC2T45 74LVCH2T45 Dual supply translating transceiver 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC2T45DC -40 C to +125 C VSSOP8 plastic very thin shrink small outline package 8 leads SOT765-1 body width 2.3 mm 74LVCH2T45DC 74LVC2T45GT -40 C to +125 C XSON8 plastic extremely thin small outline package no leads SOT833-1 8 terminals body 1 1.95 0.5 mm 74LVCH2T45GT 74LVC2T45GF -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1089 8 terminals body 1.35 1 0.5 mm 74LVCH2T45GF 74LVC2T45GN -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1116 8 terminals body 1.2 1.0 0.35 mm 74LVCH2T45GN 74LVC2T45GS -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1203 8 terminals body 1.35 1.0 0.35 mm 74LVCH2T45GS 4. Marking Table 2. Marking Type number Marking code 1 74LVC2T45DC V45 74LVCH2T45DC X45 74LVC2T45GT V45 74LVCH2T45GT X45 74LVC2T45GF V5 74LVCH2T45GF X5 74LVC2T45GN V5 74LVCH2T45GN X5 74LVC2T45GS V5 74LVCH2T45GS X5 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 74LVC LVCH2T45 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 11 16 September 2021 2 / 33