74LVC373APW-Q100J Nexperia

74LVC373A-Q100 Octal D-type transparent latch with 5 V tolerant inputs/outputs 3-state Rev. 3 4 March 2021 Product data sheet 1. General description The 74LVC373A-Q100 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using I . The I circuitry OFF OFF disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Overvoltage tolerant inputs to 5.5 V Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels High-impedance outputs when V = 0 V CC I circuitry provides partial Power-down mode operation OFF Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder jointsNexperia 74LVC373A-Q100 Octal D-type transparent latch with 5 V tolerant inputs/outputs 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC373AD-Q100 -40 C to +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74LVC373APW-Q100 -40 C to +125 C TSSOP20 plastic thin shrink small outline package SOT360-1 20 leads body width 4.4 mm 74LVC373ABQ-Q100 -40 C to +125 C DHVQFN20 plastic dual in-line compatible SOT764-1 thermal enhanced very thin quad flat package no leads 20 terminals body 2.5 4.5 0.85 mm 4. Functional diagram 1 EN 11 D7 Q7 18 19 C1 D6 Q6 17 16 3 2 1D D5 Q5 14 15 4 5 D4 Q4 13 12 7 6 D3 Q3 8 9 8 9 D2 Q2 7 6 13 12 D1 Q1 4 5 14 15 D0 Q0 3 2 17 16 LE OE 18 19 mna881 11 1 mna880 Fig. 1. Logic symbol Fig. 2. IEC logic symbol D0 Q0 3 2 D1 Q1 4 5 D2 Q2 7 6 D3 Q3 8 9 LATCH 3-STATE D4 Q4 13 12 1 to 8 OUTPUTS LE D5 Q5 14 15 D6 Q6 17 16 D7 Q7 18 19 LE LE LE 11 D Q 1 OE mna189 mna882 LE Fig. 3. Functional diagram Fig. 4. Logic diagram (one latch) 74LVC373A Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 3 4 March 2021 2 / 16