74LVC374ABQ Nexperia

74LVC374A Octal D-type flip-flop 5 V tolerant inputs/outputs positive-edge trigger 3-state Rev. 3 6 December 2012 Product data sheet 1. General description The 74LVC374A is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock input (CP) and an outputs enable input (OE) are common to all flip-flops. The eight flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition. When pin OE is LOW, the contents of the eight flip-flops is available at the outputs. When pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications. The 74LVC374A is functionally identical to the 74LVC574A, but has a different pin arrangement. 2. Features and benefits 5 V tolerant inputs/outputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels High-impedance when V =0V CC 8-bit positive edge-triggered register Independent register and 3-state buffer operation Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from 40 C to +85 C and 40 C to +125 C74LVC374A NXP Semiconductors Octal D-type flip-flop 5 V tolerant inputs/outputs positive-edge trigger 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC374AD 40 Cto +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74LVC374ADB 40 Cto +125 C SSOP20 plastic shrink small outline package 20 leads SOT339-1 body width 5.3 mm 74LVC374APW 40 Cto +125 C TSSOP20 plastic thin shrink small outline package 20 leads SOT360-1 body width 4.4 mm 74LVC374ABQ 40 Cto +125 C DHVQFN20 plastic dual in-line compatible thermal enhanced very SOT764-1 thin quad flat package no leads 20 terminals body 2.5 4.5 0.85 mm 4. Functional diagram 1 EN 11 C1 11 3 2 1D CP 3 2 D0 Q0 4 5 4 5 D1 Q1 7 6 7 6 D2 Q2 8 9 8 9 D3 Q3 13 12 13 12 D4 Q4 14 15 14 15 D5 Q5 17 16 D6 Q6 17 16 18 19 D7 Q7 18 19 OE 1 mna891 mna196 Fig 1. Logic symbol Fig 2. IEC logic symbol 74LVC374A All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 3 6 December 2012 2 of 19