BUK9K6R2-40E Nexperia

BUK9K6R2-40E Dual N-channel TrenchMOS logic level FET 23 April 2013 Product data sheet 1. General description Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use in high performance automotive applications. 2. Features and benefits Q101 compliant Repetitive avalanche rated Suitable for thermally demanding environments due to 175 C rating True logic level gate with V > 0.5 V 175 C GS(th) 3. Applications 12 V Automotive systems Motors, lamps and solenoid control Start-stop micro-hybrid applications Transmission control Ultra high performance power switching 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V drain-source voltage T 25 C T 175 C - - 40 V DS j j I drain current V = 5 V T = 25 C Fig. 1 - - 40 A D GS mb P total power dissipation T = 25 C Fig. 2 - - 68 W tot mb Static characteristics FET1 and FET2 R drain-source on-state V = 5 V I = 20 A T = 25 C Fig. 12 - 5.27 6.2 m DSon GS D j resistance Dynamic characteristics FET1 and FET2 Q gate-drain charge I = 10 A V = 32 V V = 10 V - 5.8 - nC GD D DS GS T = 25 C Fig. 14 Fig. 15 j Scan or click this QR code to view the latest information for this product LFPAK56DNXP Semiconductors BUK9K6R2-40E Dual N-channel TrenchMOS logic level FET 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 8 7 6 5 1 S1 source1 D1 D1 D2 D2 2 G1 gate1 3 S2 source2 4 G2 gate2 5 D2 drain2 S1 G1 S2 G2 mbk725 6 D2 drain2 1 2 3 4 7 D1 drain1 LFPAK56D (SOT1205) 8 D1 drain1 6. Ordering information Table 3. Ordering information Type number Package Name Description Version BUK9K6R2-40E LFPAK56D Plastic single ended surface mounted package (LFPAK56D) 8 SOT1205 leads 7. Marking Table 4. Marking codes Type number Marking code BUK9K6R2-40E 96E240 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit V drain-source voltage T 25 C T 175 C - 40 V DS j j V drain-gate voltage R = 20 k T 25 C T 175 C - 40 V DGR GS j j V gate-source voltage T 175 C DC -10 10 V GS j T 175 C Pulsed 1 2 -15 15 V j I drain current T = 25 C V = 5 V Fig. 1 - 40 A D mb GS T = 100 C V = 5 V Fig. 1 - 40 A mb GS I peak drain current T = 25 C pulsed t 10 s Fig. 4 - 295 A DM mb p BUK9K6R2-40E All information provided in this document is subject to legal disclaimers. NXP B.V. 2013. All rights reserved Product data sheet 23 April 2013 2 / 13