CBTD3861PW,118 Nexperia

CBTD3861 10-bit level shifting bus switch with output enable Rev. 3 6 March 2019 Product data sheet 1. General description The CBTD3861 provides ten bits of high-speed TTL-compatible bus switching. The low ON resistance of the switch allows connections to be made with minimal propagation delay. The CBTD3861 device is organized as one 10-bit bus switches with one output enable (OE) input. When OE is LOW, the switch is on and port A is connected to the B port. When OE is HIGH, each switch is disabled. The CBTD3861 is characterized for operation from -40 C to +85 C. 2. Features and benefits Designed to be used in 5 V to 3.3 V level shifting applications with internal diode 5 switch connection between two ports TTL-compatible control input levels Latch-up protection exceeds 100 mA per JESD78 ESD protection: HBM JESD22-A114F exceeds 2000 V CDM JESD22-C101C exceeds 1000 V 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version CBTD3861PW -40 C to +85 C TSSOP24 plastic thin shrink small outline package 24 leads SOT355-1 body width 4.4 mm CBTD3861BQ -40 C to +85 C DHVQFN24 plastic dual in-line compatible thermal enhanced SOT815-1 very thin quad flat package no leads 24 terminals body 3.5 x 5.5 x 0.85 mm 4. Functional diagram 2 22 A1 B1 11 13 A10 B10 23 OE 001aam471 Fig. 1. Logic diagramNexperia CBTD3861 10-bit level shifting bus switch with output enable 5. Pinning information 5.1. Pinning CBTD3861 terminal 1 index area 2 23 A1 OE 3 22 A2 B1 4 21 A3 B2 5 20 A4 B3 6 19 A5 B4 CBTD3861 7 18 A6 B5 8 17 A7 B6 1 24 n.c. V CC 9 16 A8 B7 2 23 A1 OE (1) 10 GND 15 A9 B8 3 22 A2 B1 11 14 A10 B9 4 21 A3 B2 5 20 A4 B3 6 19 A5 B4 001aam479 7 18 A6 B5 Transparent top view 8 17 A7 B6 (1) This is not a supply pin. The substrate is 9 16 A8 B7 attached to this pad using conductive die attach 10 15 A9 B8 material. There is no electrical or mechanical 11 14 A10 B9 requirement to solder this pad. However, if it is 12 13 GND B10 soldered, the solder land should remain floating or 001aam477 be connected to GND. Fig. 2. Pin configuration for TSSOP24 (SOT355-1) Fig. 3. Pin configuration for DHVQFN24 (SOT815-1) 5.2. Pin description Table 2. Pin description Symbol Pin Description n.c. 1 not connected A1 to A10 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 data input/output (A port) GND 12 ground (0 V) B1 to B10 22, 21, 20, 19, 18, 17, 16, 15, 14, 13 data input/output (B port) OE 23 output enable input (active LOW) V 24 positive supply voltage CC 6. Functional description Table 3. Function selection H = HIGH voltage level L = LOW voltage level Z = high-impedance OFF-state. Input Input/output OE An, Bn L An = Bn H Z CBTD3861 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 3 6 March 2019 2 / 12 GND 12 1 n.c. 13 24 B10 V CC