HEF4521BT Nexperia

HEF4521B 24-stage frequency divider and oscillator Rev. 7 30 March 2016 Product data sheet 1. General description The HEF4521B consists of a chain of 24 toggle flip-flops with an overriding asynchronous master reset input (MR), and an input circuit that allows three modes of operation. The single inverting stage (A2 to Y2) functions as: a crystal oscillator, an input buffer for an external oscillator or in combination with A1 as an RC oscillator. The crystal oscillator operates in Low-power mode when pins V and V are supplied via external resistors. SS1 DD1 Each flip-flop divides the frequency of the previous flip-flop by two, consequently the 24 HEF4521B counts up to 2 = 16777216. The counting advances on the HIGH-to-LOW 18 24 transition of the clock (A2). The outputs from each of the last seven stages (2 to 2 ) are available for additional flexibility. It operates over a recommended V power supply range of 3 V to 15 V referenced to V DD SS (usually ground). Unused inputs must be connected to V , V , or another input. DD SS 2. Features and benefits Low power crystal oscillator operation Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +85 C. Type number Package Name Description Version HEF4521BT SO16 plastic small outline package 16 leads body width 3.9 mm SOT109-1HEF4521B NXP Semiconductors 24-stage frequency divider and oscillator 4. Functional diagram 9 < WR67 *(6 & 9 67 *WR (6 & 67 * (6 WR & 4 4 4 4 4 4 4 < Fig 1. Functional diagram 9 9 ))VWR F RJLR O W 9 9 < DH D Fig 2. Schematic diagram of clock input circuitry HEF4521B All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 7 30 March 2016 2 of 17 66 66 DDH &3 4 &3 66 4 &3 05