HEF4555B-Q100 1-of-4 decoder/demultiplexer Rev. 2 15 October 2018 Product data sheet 1. General description The HEF4555B-Q100 contains two 1-of-4 decoders/demultiplexers. Each has two address inputs (nA0 and nA1, an active LOW enable input (nE) and four mutually exclusive outputs which are active HIGH (nY0 to nY3). When used as a decoder, nE when HIGH, forces nY0 to nY3 LOW. When used as a demultiplexer, the appropriate output is selected by the information on nA0 and nA1 with nE as data input. All unselected outputs are LOW. It operates over a recommended V power supply range of 3 V to 15 V referenced to V (usually DD SS ground). Unused inputs must be connected to V , V , or another input. DD SS This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 3) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 3) Specified from -40 C to +85 C Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Complies with JEDEC standard JESD 13-B 3. Applications Code conversion Address decoding Demultiplexing: when using the enable input as data input 4. Ordering information Table 1. Ordering information All types operate from -40 C to +85 C. Type number Package Name Description Version HEF4555BT-Q100 SO16 plastic small outline package 16 leads body width 3.9 mm SOT109-1Nexperia HEF4555B-Q100 1-of-4 decoder/demultiplexer 5. Functional diagram 1Y0 4 2 1A0 nY0 1Y1 5 DECODER 1Y2 6 nA0 3 1A1 1Y3 7 nY1 1 1E 2Y0 12 nA1 14 2A0 2Y1 11 nY2 DECODER 2Y2 10 13 2A1 2Y3 9 nE 15 2E nY3 001aae751 001aae753 Fig. 1. Functional diagram Fig. 2. Logic diagram for one decoder/multiplexer 6. Pinning information 6.1. Pinning HEF4555B 1E 1 16 V DD 1A0 2 15 2E 1A1 3 14 2A0 4 13 1Y0 2A1 1Y1 5 12 2Y0 1Y2 6 11 2Y1 1Y3 7 10 2Y2 V 8 9 2Y3 SS 001aae752 Fig. 3. Pin configuration SOT109-1 (SO16) 6.2. Pin description Table 2. Pin description Symbol Pin Description 1A0, 1A1, 2A0, 2A1 2, 3, 14, 13 address input 1E, 2E 1, 15 enable input (active LOW 1Y0, 1Y1, 1Y2, 1Y3, 2Y0, 2Y1, 2Y2, 2Y3 4, 5, 6, 7, 12, 11, 10, 9 output (active HIGH) V 16 supply voltage DD V 8 ground (GND) SS HEF4555B Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 2 15 October 2018 2 / 10