PDTD123EUX Nexperia

PDTD1xxxU series 500 mA, 50 V NPN resistor-equipped transistors Rev. 1 13 May 2014 Product data sheet 1. Product profile 1.1 General description NPN Resistor-Equipped Transistor (RET) family in a very small SOT323 (SC-70) Surface-Mounted Device (SMD) plastic package. Table 1. Product overview Type number Package PNP Package complement configuration Nexperia JEITA JEDEC PDTD113EU SOT323 SC-70 - PDTB113EU very small PDTD113ZU PDTB113ZU PDTD123EU PDTB123EU PDTD123YU PDTB123YU PDTD143EU PDTB143EU PDTD143XU PDTB143XU PDTD114EU PDTB114EU 1.2 Features 500 mA output current capability 10 % resistor ratio tolerance Built-in bias resistors AEC-Q101 qualified Simplifies circuit design High temperature applications up to 175 C Reduces component count 1.3 Applications IC inputs control Switching loads Cost-saving alternative to BC807 or BC817 series transistors in digital applicationsPDTD1xxxU series Nexperia 500 mA, 50 V NPN resistor-equipped transistors 1.4 Quick reference data Table 2. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V collector-emitter voltage open base - - 50 V CEO I output current - - 500 mA O R1 bias resistor 1 (input) PDTD113EU 1 k PDTD113ZU 1 k PDTD123EU 2.2 k PDTD123YU 2.2 k PDTD143EU 4.7 k PDTD143XU 4.7 k PDTD114EU 10 k R2 bias resistor 2 (base-emitter) PDTD113EU 1 k PDTD113ZU 10 k PDTD123EU 2.2 k PDTD123YU 10 k PDTD143EU 4.7 k PDTD143XU 10 k PDTD114EU 10 k 2. Pinning information Table 3. Pinning Pin Description Simplified outline Graphic symbol 1 input (base) 3 3 2 GND (emitter) R1 1 3 output (collector) R2 12 2 sym007 3. Ordering information Table 4. Ordering information Type number Package Name Description Version PDTD1xxxU series SC-70 plastic surface-mounted package 3 leads SOT323 PDTD1XXXU SER All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 1 13 May 2014 2 of 27