NTE2055 Integrated Circuit 1 CMOS, 3 / Digit A/D Converter 2 Description: 1 The NTE2055 is a high performance, low power, 3 / digit A/D converter combining both linear CMOS and 2 digital CMOS circuits on a single monolithic IC. Available in a 24Lead DIP type package, this device is de- signed to minimize use of external components. With two external resistors and two external capacitors, the system forms a dual slope A/D converter with automatic zero correction and automatic polarity. The NTE2055 is ratiometric and may be used over a fullscale range from 1.999V to 199.9mV. Systems using this device may operate over a wide range of power supply voltages for ease of use with batteries, or with stan- dard 5V supplies. The output drive conforms with standard BSeries CMOS specifications and can drive a lowpower Schottky TTL load. The high impedance MOS inputs allow applications in current and resistance meters as well as voltmeters. In addition to DVM/DPM applications, the NTE2055 finds use in digital thermometers, digital scales, remote A/D, A/D control systems, and in MPU systems. Features: Accuracy: 0.05% of Reading 1 Count Two Voltage Ranges: 1.999V and 199.9mV Up to 25 Conversions /s Z > 100M in AutoPolarity and AutoZero Single Positive Voltage Reference Standard BSeries CMOS Outputs: Drives One Low Power Schottky Load Uses OnChip System Clock, or External Clock Wide Supply Range: e.g., 4.5V to 8.0V Overrange and Underrange Signals Available Operates in Auto Ranging Circuits Operates with LED and LCD Displays Low External Component Count Chip Complexity: 1326 FETs Absolute Maximum Ratings: DC Supply Voltage, V to V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V to +18V DD EE Voltage, Ant Pin, Referenced to V , V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V to V +0.5V EE DD DC Input Current, Per Pin, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA in Operating Temperature Range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 to +85C A Storage Temperature Range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 to +150C stg Note 1. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields however, it is advised that normal precautions be taken to avoid applications of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation it is recommended that V and V be constrained to the range V (V or V ) V . in out EE in out DD Recommended Operating Conditions: (V = 0 or V ) SS EE DC Supply Voltage V to Analog GND, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.0 to 8.0V DD DD V to Analog GND, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.8 to 8.0V EE EE Clock Frequency, f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 to 400kHz Clk Zero Offset Correction Capacitor, C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1 20% F oElectrical Characteristics: (C = 0.1 F mylar, R = 470k V = 2V, R = 27k V = 200mV, I I ref I ref R = 300k , T = +25C all voltages referenced to Analog GND, Pin1, unless C A otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit V = 2.000V 0.05 0.05 +0.05 %rdg LinearityOutput Reading V = 5V, ref DD V = 5V, Count + Count EE Note 2 V = 200.0mV 0.05 %rdg ref Stability Output Reading V = 5V, V = 5V, V = 199mV, 3 LSD DD EE X V = 200mV ref Symmetry Output Reading V = 5V, V = 5V, V = 2000mV, 4 LSD DD EE ref Note 3 ZeroOutput Reading V = 5V, V = 5V, V = 0V, V = 2V 0 0 LSD DD EE X ref Bias Current Analog Input V = 5V, V = 5V 20 100 pA DD EE Reference Input 20 100 pA Analog GND 20 500 pA Common Mode Rejection V = 5V, V = 5V, f = 32kHz, 65 dB DD EE Clk V = 1.4V, V = 2V X ref Input Voltage (Pin9, Pin10) 0 Level V V = 5V, V = 4.5V or 0.5V, Note 3 2.25 1.5 V IL DD O V = 10V, V = 9V or 1V, Note 3 4.50 3.0 V DD O V = 15V, V = 13.5V or 1.5V, Note 3 6.75 4.0 V DD O 1 Level V V = 5V, V = 0.5V or 4.5V, Note 3 3.5 2.75 V IH DD O V = 10V, V = 1V or 9V, Note 3 7.0 5.50 V DD O V = 15V, V = 1.5V or 13.5V, Note 3 11.0 8.25 V DD O Output Voltage (Pin14 to Pin23) 0 Level V V = 0V V = 5V, V = 5V 0 0.05 V OL SS DD EE V = 5V 5.0 4.95 V SS 1 Level V V = 0V 4.95 5.0 V OH SS V = 5V 4.95 5.0 V SS Output Current (Pin14 to Pin23) Source I V = 5V, V = 0V, V = 4.6V 0.2 0.36 mA OH DD SS OH V = 5V EE V = 5V, V = 4.5V 0.5 0.9 mA SS OH Sink I V = 0V, V = 0.4V 0.51 0.88 mA OL SS OL V = 5V, V = 4.5V 1.3 2.25 mA SS OL Input Current (DU, Pin9) I V = 5V, V = 5V 0.00001 0.3 A DU DD EE Quiescent Current I V to V , V = 5V, V = 5V 0.9 2.0 mA Q DD EE DD EE I = 0 SS V = 8V, V = 8V 1.8 4.0 mA DD EE DC Supply Rejection V = 5V, V = 5V, V to V , I = 0, 0.5 mV/V DD EE DD EE SS V = 2V ref Note 2. Accuracy The accuracy of the meter at full scale is the accuracy of the setting of the reference volt- age. Zero is recalculated during each conversion cycle. The meaningful specification is linearity. In other words, the deviation from correct reading for all inputs other than positive full scale and zero is defined as the linearity specification. Note 3. Symmetry Defined as the difference between a negative and positive reading of the same voltage at or near full scale. Note 4. Referenced to V for Pin9. Referenced to V for Pin10. SS EE