74AHC3G14GD,125 NXP

74AHC3G14 74AHCT3G14 Triple inverting Schmitt trigger Rev. 9 4 December 2018 Product data sheet 1. General description 74AHC3G14 and 74AHCT3G14 are high-speed Si-gate CMOS devices. They provide three inverting buffers with Schmitt trigger action. These devices are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features and benefits Symmetrical output impedance High noise immunity ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101D exceeds 1000 V Low power dissipation Balanced propagation delays Multiple package options Specified from -40 C to +85 C and -40 C to +125 C 3. Applications Wave and pulse shaper for highly noisy environment Astable multivibrator Monostable multivibrator 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC3G14DP -40 C to +125 C TSSOP8 plastic thin shrink small outline package 8 leads SOT505-2 body width 3 mm lead length 0.5 mm 74AHCT3G14DP 74AHC3G14DC -40 C to +125 C VSSOP8 plastic very thin shrink small outline package 8 leads SOT765-1 body width 2.3 mm 74AHCT3G14DC 74AHC3G14GT -40 C to +125 C XSON8 plastic extremely thin small outline package no leads SOT833-1 8 terminals body 1 x 1.95 x 0.5 mm 74AHCT3G14GTNexperia 74AHC3G14 74AHCT3G14 Triple inverting Schmitt trigger 5. Marking Table 2. Marking codes Type number Marking code 1 74AHC3G14DP A14 74AHCT3G14DP C14 74AHC3G14DC A14 74AHCT3G14DC C14 74AHC3G14GT A14 74AHCT3G14GT C14 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram 1A 1Y 3Y 3A A Y 2A 2Y mna025 001aah728 001aah729 Fig. 3. Logic diagram (one Schmitt Fig. 1. Logic symbo Fig. 2. IEC logic symbol trigger) 7. Pinning information 7.1. Pinning 74AHC3G14 74AHCT3G14 1A 1 8 V CC 3Y 2 7 1Y 74AHC3G14 74AHCT3G14 2A 3 6 3A 1A 1 8 V CC 3Y 2 7 1Y GND 4 5 2Y 2A 3 6 3A GND 4 5 2Y 001aam630 001aai259 Transparent top view Fig. 4. Pin configuration SOT505-2 and SOT765-1 Fig. 5. Pin configuration SOT833-1 74AHC AHCT3G14 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 9 4 December 2018 2 / 15