74HC257N,652 NXP

74HC257 74HCT257 Quad 2-input multiplexer 3-state Rev. 05 13 January 2010 Product data sheet 1. General description The 74HC257 74HCT257 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC257 and 74HCT257 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when S is HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs. The 74HC257 and 74HCT257 are the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high-impedance OFF-state when OE is HIGH. The logic equations for the outputs are: 1Y = OE ()1I1 S 1I0 S 2Y = OE ()2I1 S 2I0 S 3Y = OE ()3I1 S 3I0 S 4Y = OE ()4I1 S 4I0 S Except for their non-inverting (true) outputs the 74HC257 74HCT257 are identical to the 74HC258. 2. Features Non-inverting data path 3-state outputs interface directly with system bus Complies with JEDEC standard no. 7A ESD protection: HBM JESD22-A114E exceeds 2 000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 CNXP Semiconductors 74HC257 74HCT257 Quad 2-input multiplexer 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC257N 40 C to +125 C DIP16 plastic dual in-line package 16 leads (300 mil) SOT38-4 74HCT257N 74HC257D 40 C to +125 C SO16 plastic small outline package 16 leads body width 3.9 mm SOT109-1 74HCT257D 74HC257DB 40 C to +125 C SSOP16 plastic shrink small outline package 16 leads SOT338-1 body width 5.3 mm 74HCT257DB 74HC257PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74HCT257PW 4. Functional diagram 1 G1 15 EN 1 S 2 1I0 MUX 2 1 4 1Y 4 3 3 1I1 1 5 2I0 5 2Y 7 7 6 2I1 6 3I0 11 9 3Y 11 10 3I1 9 10 14 4I0 4Y 12 14 13 4I1 12 15 OE 13 mga835 001aad467 Fig 1. Logic symbol Fig 2. IEC logic symbol 74HC HCT257 5 NXP B.V. 2010. All rights reserved. Product data sheet Rev. 05 13 January 2010 2 of 17