74HCT2G86GD NXP

74HC2G86; 74HCT2G86 Dual 2-input EXCLUSIVE-OR gate Rev. 4 14 March 2014 Product data sheet 1. General description The 74HC2G86; 74HCT2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V Input levels: For 74HC2G86: CMOS level For 74HCT2G86: TTL level Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays Multiple package options ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from 40 C to +85 C and 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC2G86DP 40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads; SOT505-2 body width 3 mm; lead length 0.5 mm 74HCT2G86DP 74HC2G86DC 40 C to +125 C VSSOP8 plastic very thin shrink small outline package; 8 leads; SOT765-1 body width 2.3 mm 74HCT2G86DC 74HC2G86GD 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads; SOT996-2 8 terminals; body 3 2 0.5 mm 74HCT2G86GD74HC2G86; 74HCT2G86 NXP Semiconductors Dual 2-input EXCLUSIVE-OR gate 4. Marking Table 2. Marking code [1] Type number Marking code 74HC2G86DP H86 74HCT2G86DP T86 74HC2G86DC H86 74HCT2G86DC T86 74HC2G86GD H86 74HCT2G86GD T86 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram = 1 1A 1Y 1B 2A 2Y = 1 2B 001aah760 001aah761 Fig 1. Logic symbol Fig 2. IEC logic symbol B Y A mna040 Fig 3. Logic diagram (one gate) 74HC_HCT2G86 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 4 14 March 2014 2 of 15