74HCT393N,652 NXP

74HC393 74HCT393 Dual 4-bit binary ripple counter Rev. 6 3 December 2015 Product data sheet 1. General description The 74HC393 7474HCT393 is a dual 4-stage binary ripple counter. Each counter features a clock input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on nMR clears the counter stages and forces the outputs LOW, independent of the state of nCP. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Input levels: For 74HC393: CMOS level For 74HCT393: TTL level Complies with JEDEC standard no. 7A ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V. Two 4-bit binary counters with individual clocks Divide by any binary module up to 28 in one package Two master resets to clear each 4-bit counter individually 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC393D 40 C to +125 C SO14 plastic small outline package 14 leads body width 3.9 mm SOT108-1 74HCT393D 74HC393DB 40 C to +125 C SSOP14 plastic shrink small outline package 14 leads body width SOT337-1 5.3 mm 74HCT393DB 74HC393PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads body SOT402-1 width 4.4 mm 74HCT393PW 74HC393BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin SOT762-1 quad flat package no leads 14 terminals 74HCT393BQ body 2.5 3 0.85 mm74HC393 74HCT393 Nexperia Dual 4-bit binary ripple counter 4. Functional diagram 4 &3 4 4 5 0 4 4 &3 4 4 5 0 4 Fig 1. Logic symbol Fig 2. IEC logic symbol 4 &3 4 %,7 1 5 %, < 4 ( 5,33/ 5 4 4 &3 4 %,7 1 5 %, < 4 ( 5,33/ 5 4 DG D Fig 3. Functional diagram Fig 4. State diagram 74HC HCT393 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 6 3 December 2015 2 of 19 DDG &2817(5 0 &2817(5 0 DDG DDG &7 &7 5 &7 &7 &7 5 &7