74LVC1G99 Ultra-configurable multiple function gate 3-state Rev. 8 5 April 2013 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including, AND, OR, NAND, NOR, XOR, XNOR, inverter, buffer and MUX. No external components are required to configure the device as all inputs can be connected directly to V or CC GND. The 3-state output is controlled by the output enable input (OE). A HIGH level at OE causes the output (Y) to assume a high-impedance OFF-state. When OE is LOW, the output state is determined by the signals applied to the Schmitt trigger inputs (A, B, C and D). Due to the use of Schmitt trigger inputs the device is tolerant of slowly changing input signals, transforming them into sharply defined, jitter free output signals. By eliminating leakage current paths to V and GND, the inputs and disabled output are also CC over-voltage tolerant, making the device suitable for mixed-voltage applications. This device is fully specified for partial power-down applications using I . OFF The I circuitry disables the output, preventing the damaging backflow current through OFF the device when it is powered down. The 74LVC1G99 is fully specified over the supply range from 1.65 V to 5.5 V. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 24 mA output drive (V =3.0 V) CC CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from 40 Cto+85 C and 40 C to +125 C.74LVC1G99 NXP Semiconductors Ultra-configurable multiple function gate 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G99DP 40 C to +125 C TSSOP8 plastic thin shrink small outline package 8 leads body SOT505-2 width 3 mm lead length 0.5 mm 74LVC1G99GT 40 C to +125 C XSON8 plastic extremely thin small outline package no leads SOT833-1 8 terminals body 1 1.95 0.5 mm 74LVC1G99GF 40 C to +125 C XSON8 extremely thin small outline package no leads SOT1089 8 terminals body 1.35 1 0.5 mm 74LVC1G99GD 40 C to +125 C XSON8 plastic extremely thin small outline package no leads SOT996-2 8 terminals body 3 2 0.5 mm 74LVC1G99GM 40 C to +125 C XQFN8 plastic, extremely thin quad flat package no leads SOT902-2 8 terminals body 1.6 1.6 0.5 mm 74LVC1G99GN 40 C to +125 C XSON8 extremely thin small outline package no leads SOT1116 8 terminals body 1.2 1.0 0.35 mm 74LVC1G99GS 40 C to +125 C XSON8 extremely thin small outline package no leads SOT1203 8 terminals body 1.35 1.0 0.35 mm 4. Marking Table 2. Marking codes 1 Type number Marking code 74LVC1G99DP V99 74LVC1G99GT V99 74LVC1G99GF YF 74LVC1G99GD V99 74LVC1G99GM V99 74LVC1G99GN YF 74LVC1G99GS YF 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 74LVC1G99 All information provided in this document is subject to legal disclaimers. NXP B.V. 2013. All rights reserved. Product data sheet Rev. 8 5 April 2013 2 of 32