74LVC541ABQ NXP

74LVC541A Octal buffer/line driver with 5 V tolerant inputs/outputs 3-state Rev. 4 25 November 2011 Product data sheet 1. General description The 74LVC541A is an octal non-inverting buffer/line driver with 5 V tolerant inputs and outputs. The 3-state outputs are controlled by the output enable inputs OE1 and OE2. This device is fully specified for partial power-down applications using I . The I OFF OFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications. 2. Features and benefits 5 V tolerant inputs for interlacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from 40 C to +85 C and 40 C to +125 C74LVC541A NXP Semiconductors Octal buffer/line driver with 5 V tolerant inputs/outputs 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC541AD 40 C to +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74LVC541ADB 40 C to +125 C SSOP20 plastic shrink small outline package 20 leads SOT339-1 body width 5.3 mm 74LVC541APW 40 C to +125 C TSSOP20 plastic thin shrink small outline package 20 leads SOT360-1 body width 4.4 mm 74LVC541ABQ 40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal enhanced very SOT764-1 thin quad flat package no leads 20 terminals body 2.5 4.5 0.85 mm 4. Functional diagram Y0 A0 2 18 A1 Y1 3 17 1 & A2 Y2 EN 4 16 19 18 2 A3 Y3 5 15 17 3 16 4 Y4 A4 6 14 5 15 6 14 Y5 A5 13 7 7 13 8 12 A6 Y6 8 12 9 11 mna898 Y7 A7 11 9 OE1 1 OE2 19 mna900 Fig 1. IEC logic symbol Fig 2. Functional diagram 74LVC541A All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 4 25 November 2011 2 of 17