74LVC541AD-Q100J Nexperia

74LVC541A-Q100 Octal buffer/line driver with 5 V tolerant inputs/outputs 3-state Rev. 3 13 March 2020 Product data sheet 1. General description The 74LVC541A-Q100 is an octal non-inverting buffer/line driver with 5 V tolerant inputs and outputs. The output enable inputs OE1 and OE2 control the 3-state outputs. This device is fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing the damaging backflow current through the device when it is powered down. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C 5 V tolerant inputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC541AD-Q100 -40 C to +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74LVC541APW-Q100 -40 C to +125 C TSSOP20 plastic thin shrink small outline package SOT360-1 20 leads body width 4.4 mm 74LVC541ABQ-Q100 -40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal SOT764-1 enhanced very thin quad flat package no leads 20 terminals body 2.5 4.5 0.85 mmNexperia 74LVC541A-Q100 Octal buffer/line driver with 5 V tolerant inputs/outputs 3-state 4. Functional diagram Y0 A0 2 18 A1 Y1 3 17 A2 Y2 4 16 A3 Y3 5 15 A4 Y4 6 14 1 & EN 19 A5 Y5 13 7 2 18 3 17 A6 Y6 8 12 4 16 5 15 Y7 A7 11 9 6 14 13 7 12 8 OE1 1 9 11 OE2 19 mna898 mna900 Fig. 1. IEC logic symbol Fig. 2. Functional diagram 5. Pinning information 5.1. Pinning 74LVC541A-Q100 terminal 1 index area A0 2 19 OE2 A1 3 18 Y0 A2 4 17 Y1 74LVC541A-Q100 A3 5 16 Y2 OE1 1 20 V CC A4 6 15 Y3 A0 2 19 OE2 A5 7 14 Y4 A1 3 18 Y0 (1) A6 8 13 Y5 GND A2 4 17 Y1 A7 9 12 Y6 A3 5 16 Y2 A4 6 15 Y3 A5 7 14 Y4 aaa-005880 A6 8 13 Y5 Transparent top view A7 9 12 Y6 (1) This is not a ground pin. There is no electrical or GND 10 11 Y7 mechanical requirement to solder the pad. In case aaa-005879 soldered, the solder land should remain floating or connected to GND. Fig. 3. Pin configuration for SOT163-1 (SO20) and SOT360-1 (TSSOP20) Fig. 4. Pin configuration for SOT764-1 (DHVQFN20) 74LVC541A Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 13 March 2020 2 / 13 GND 10 1 OE1 Y7 11 20 V CC