ADC1206S040/055/070
Single 12 bits ADC, up to 40 MHz, 55 MHz or 70 MHz
Rev. 02 12 August 2008 Product data sheet
1. General description
The ADC1206S040/055/070 are a family of BiCMOS 12-bit Analog-to-Digital Converters
(ADC) optimized for a wide range of applications such as cellular infrastructures,
professional telecommunications, imaging, and digital radio. It converts the analog input
signal into 12-bit binary coded digital words at a maximum sampling rate of 70 MHz. All
static digital inputs (SH, CE and OTC) are Transistor-Transistor Logic (TTL) and CMOS
compatible and all outputs are CMOS compatible. A sine wave clock input signal can also
be used.
2. Features
n 12-bit resolution
n Sampling rate up to 70 MHz
n - 3 dB bandwidth of 245 MHz
n 5 V power supplies and 3.3 V output power supply
n Binary or twos complement CMOS outputs
n In-range CMOS compatible output
n TTL and CMOS compatible static digital inputs
n TTL and CMOS compatible digital outputs
n Differential AC or Positive Emitter-Coupled Logic (PECL) clock input; TTL compatible
n Power dissipation 550 mW (typical)
n Low analog input capacitance (typical 2 pF), no buffer amplier required
n Integrated sample and hold amplier
n Differential analog input
n External amplitude range control
n Voltage controlled regulator included
n - 40 C to +85 C ambient temperature
3. Applications
High-speed analog-to-digital conversion for:
n Cellular infrastructure
n Professional telecommunication
n Digital radio
n Radar
n Medical imaging
n Fixed network
n Cable modemADC1206S040/055/070
NXP Semiconductors
Single 12 bits ADC, up to 40 MHz, 55 MHz or 70 MHz
n Barcode scanner
n Cable Modem Termination System (CMTS)/
Data Over Cable Service Interface Specication (DOCSIS)
4. Quick reference data
Table 1. Quick reference data
V = V2 to V44, V3 to V4 and V41 to V40 = 4.75 V to 5.25 V;
CCA
V = V37 to V38 and V15 to V17 = 4.75 V to 5.25 V; V = V33 to V34 = 3.0 V to 3.6 V; AGND
CCD CCO
and DGND shorted together; T = - 40 Cto85 C; V - V = 1.9 V;
amb I(IN)(p-p) I(INN)(p-p)
V =V - 1.75 V; V =V - 1.6 V; typical values measured at V =V = 5 V and
ref CCA3 I(cm) CCA3 CCA CCD
V = 3.3 V, T =25 C and C = 10 pF; unless otherwise specied.
CCO amb L
Symbol Parameter Conditions Min Typ Max Unit
V analog supply voltage 4.75 5.0 5.25 V
CCA
V digital supply voltage 4.75 5.0 5.25 V
CCD
V output supply voltage 3.0 3.3 3.6 V
CCO
I analog supply current - 78 87 mA
CCA
I digital supply current - 27 30 mA
CCD
I output supply current f = 20 MHz -3 4 mA
CCO clk
f = 400 kHz
i
INL integral non-linearity f = 20 MHz - 2.6 4.5 LSB
clk
f = 400 kHz
i
DNL differential f = 20 MHz - 0.5 +1.1 - 0.95 LSB
clk
non-linearity f = 400 kHz
i
(no missing code
guaranteed)
f maximum clock ADC1206S040H 40 - - MHz
clk(max)
frequency
ADC1206S055H 55 - - MHz
ADC1206S070H 70 - - MHz
P total power dissipation f = 55 MHz - 550 660 mW
tot clk
f = 20 MHz
i
5. Ordering information
Table 2. Ordering information
Type number Package Sampling
frequency
Name Description Version
(MHz)
ADC1206S040H QFP44 plastic quad at package; 44 leads (lead length 1.3 mm); SOT307-2 40
body 10 10 1.75 mm
ADC1206S055H QFP44 plastic quad at package; 44 leads (lead length 1.3 mm); SOT307-2 55
body 10 10 1.75 mm
ADC1206S070H QFP44 plastic quad at package; 44 leads (lead length 1.3 mm); SOT307-2 70
body 10 10 1.75 mm
ADC1206S040_055_070_2 NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 12 August 2008 2 of 32