ADC1207S080HW/C1,1 NXP

ADC1207S080 Single 12 bits ADC, up to 80 MHz with direct/ultra high IF sampling Rev. 02 7 August 2008 Product data sheet 1. General description The ADC1207S080 is a 12-bit Analog-to-Digital Converter (ADC) optimized for direct Input Frequency (IF) sampling and supporting the most demanding use conditions in ultra high IF radio transceivers for cellular infrastructure and other applications such as wireless infrastructure, optical networking and xed telecommunication. Due to its broadband input capabilities, the ADC1207S080 is ideal for single and multiple carriers data conversion. Operating at a maximum sampling rate of 80 MHz, analog input signals are converted into 12-bit binary coded digital words. All static digital inputs are CMOS compatible. All output signals are Low-Voltage Complementary Metal-Oxide Semiconductor (LVCMOS) compatible. The ADC1207S080 offers the most exible acquisition control system because of its programmable Complete Conversion Signal (CCS) that allows to adjust the delay of the acquisition clock. The ADC1207S080 offers the lowest input capacitance (< 1 pF) and therefore the highest exibility in front-end aliasing lter strategy because of its internal front-end buffer. 2. Features n 12-bit resolution n Differential input with 375 MHz bandwidth n 90 dB SFDR 71 dB S/N (f = 225 MHz f = 80 MHz B = 5 MHz) i clk n 74 dB SFDR 66.5 dB S/N (f = 175 MHz f = 80 MHz B = Nyquist) i clk n High speed sampling rate up to 80 MHz n Internal front-end buffer (input capacitance < 1 pF) n Programmable acquisition output clock (complete conversion signal) n Full-scale controllable from 1.5 V to 2 V (p-p) continuous scale n Single 5 V power supply n 3.3 V LVCMOS compatible digital outputs n Binary or twos-complement LVCMOS outputs n CMOS compatible static digital inputs n Only 2 clock cycles latency n Industrial temperature range from - 40 C to +85 C n HTQFP48 packageADC1207S080 NXP Semiconductors Single 12 bits ADC, up to 80 MHz with direct/ultra high IF sampling 3. Applications High speed analog to digital conversion for: n Radio transceivers n Wireless infrastructure n Cable modem n Digital storage scope n Fixed telecommunication, n Optical networking n Wireless Local Area Network (WLAN) infrastructure. n General purpose applications 4. Ordering information Table 1. Ordering information Type number Package Sampling frequency Name Description Version (MHz) ADC1207S080HW HTQFP48 plastic thermal enhanced thin quad at package 48 leads SOT545-2 80 body 7 7 1 mm exposed die pad 5. Block diagram CLK CLKN ADC1207S080 2 DEL0 to CLOCK DRIVER DEL1 CCS 12 12 D0 to D11 LATCH front-end OTC buffer TRACK IN RESISTOR ADC AND LADDERS CORE INN HOLD V CCO U/I IR LATCH FSIN VREF CMADC OUTPUTS FSOUT REFERENCE REFERENCE ENABLE 014aaa430 CMADC DEC CE N Fig 1. Block diagram ADC1207S080 2 NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 7 August 2008 2 of 21