Dual-core, highly secure, energy- efficient MCU K32 L3 MCU Family Building on the success and wide adoption of the Kinetis MCU portfolio, the K32 L3 MCU family is designed to deliver a power-optimized implementation along with advanced security capabilities and protection from physical tamper events. and a low-power MCU. With up to 1.25 MB flash and up TARGET APPLICATIONS to 384 kB SRAM, the K32 L3 family offers ample memory Building automation resources to address different applications tasks in a small Security and access control form factor, low-power, and highly secure design. Building control and monitoring The introduction of the K32 L3 family is the start of a long Building HVAC control line of MCUs which will further advance our security and Secure applications power optimization to lead the market in next-generation, power-conscious and low-leakage applications. Industrial Factory automation Take advantage of the robust enablement to reduce development effort and speed time-to-market with Robotics NXPs comprehensive offering of development tools Smart home and MCUXpresso software providing an open-source Door locks software development kit (SDK), an easy-to-use integrated development environment (IDE) and a comprehensive suite Smart thermostats of system configuration tools. Lighting control ENABLEMENT Security systems FRDM-K32L3A6 Freedom development board OVERVIEW Support for NXPs MCUXpresso and IAR Embedded The K32 L3 MCU family delivers significant improvements in Workbench IDEs power optimization and security advancements to address Full integration with NXPs MCUXpresso SDK a wide range of industrial and IoT applications. The K32 L3 Support for multiple RTOSes including FreeRTOS family provides new enhancements such as low-leakage, power-optimized peripherals, a DC-DC converter, and security features like authenticated boot, secure update and tamper detection pins. The K32 L3 family includes a high-performance Arm Cortex -M4 processor and a low-power Cortex-M0+ processor, ideal for applications that require a host MCU K32 L3 MCU FAMILY BLOCK DIAGRAM K32 L3 MCU FAMILY BLOCK DIAGRAM Core Platform Timers Arm Cortex -M4 LPIT 2x LPTMR 3x Up to 72 MHz (4 Channel) (32-bit) DSP, sFPU, NVIC, SysTick TPM 2x TPM 2x (6 Channel) (2 Channel) Arm Cortex-M0+ Up to 72 MHz Time Stamp Timer Real-Time Clock Division, Square Root, NVIC, Systick Communication and HMI Interfaces System Control EMVSIM External Bus DMA Trigger Multiplexer FlexIO GPIO 2 System CLK Generator Peripheral CLK CTRL LP I C 4x SAI System PWR Management Low-Leakage Wake-Up SDHC LP SPI 4x External Watchdog Watchdog LP UART 4x USB Memory Security FLASH CAU Tamper Up to 1.25 MB RAM Resource Domain CTRL CRC Up to 384 kB Boot ROM Random NUM Generator 48 kB Clocks Analog LP FLL SIRC LP ADC LP DAC (12-bit) 48/72 MHz 2/8 MHz (12-bit) FIRC RTC OSC Dual Output DC/DC LP CMP 2x 48/52/56/60 MHz 32.768 kHz Battery Monitor Temperature Sensor K32 L3 MCU FAMILY KEY FEATURES AND BENEFITS Features Benefits The dual-core feature (72 MHz Arm Cortex -M4 core and Cortex M0+ core) of this family makes it ideal for applications that Dual-Core Architecture require a high-performance host process to run the application and a low-power processor for low-throughput operations Ample memory resources (with up to 1.25 MB flash, up to 384 kB SRAM and 48 kB ROM (Bootloader)) to fit different custom Large On-Chip Memory application code and data, reducing complex two-chip solutions to a single device Resource Domain Controller for access control, system memory protection and peripheral isolation Cryptographic subsystem that includes a dedicated core, dedicated instruction memory (IRAM and IROM) and dedicated data RAM for autonomous implementation of encryption, signing, and hashing algorithms including AES, DES, SHA, RSA and ECC High Security Secure key management for storing and protecting sensitive security keys Wiping of the crypto subsystem memory, including security keys, upon sensing a security breach or physical tamper event Secure Boot Built-in secure boot to assure only authorized and authenticated code runs in the device DC-DC Converter Reduces the effective current consumption over standard bypass mode Analog High-performance on-chip analog (ADC, DAC, CMP) for sensor aggregation and other sophisticated applications Small, High Pin-Count Packages Large I/O capability in different packages including BGA, LQFP and QFN Comprehensive Enablement Complete development hardware, software stacks, drivers and RTOS for easy design and fast time-to-market ORDERABLE PART NUMBER Product Memory Core Package Part Number Availability Flash SRAM Cortex-M4 Cortex-M0+ Package 176 VFBGA K32L3A60VPJ1A Q3 2019 1.25 MB 384 kB 9 x 9 x 0.86mm 0.5mm pitch www.nxp.com/K32L3 NXP, the NXP logo and Kinetis are trademarks of NXP B.V. All other product or service names are the property of their respective owners. Arm and Cortex are trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. The related technology may be protected by any or all of patents, copyrights, designs and trade secrets. All rights reserved. 2019 NXP B.V. Document Number: K32MCUSFS REV 4