Document Number: MC33880 Freescale Semiconductor Rev. 8.0, 5/2012 Technical Data Configurable Octal Serial Switch with Serial Peripheral Interface 33880 I/O The 33880 device is an 8-output hardware configurable high side/ HIGH/LOW SIDE SWITCH low side switch with 8-bit serial input control using the serial peripheral interface (SPI). Two of the outputs can be controlled directly via microcontroller for pulse-width modulation (PWM) applications. The 33880 controls various inductive or incandescent loads by directly interfacing with a microcontroller. The circuit s innovative monitoring and protection features include very low standby currents, cascadable fault reporting, internal 40 V output clamping for low side configurations, internal -20 V output clamping for high side configurations, output specific diagnostics, and independent shutdown of outputs. EG SUFFIX (PB-FREE) EW SUFFIX (PB-FREE) 98ASB42345B 98ARH99137A Features 28-PIN SOICW 32-PIN SOICW Designed to operate 5.5 V < V < 24.5 V PWR 8-bit SPI for control and fault reporting, 3.3/ 5.0 V compatible Outputs are current limited (0.8 A to 2.0 A) to drive incandescent ORDERING INFORMATION lamps Device Output voltage clamp is +45 V (typical) (low side drive) and -20 V Temperature (For Tape and Reel, add Package (typical) (high side drive) during inductive switching Range (T ) A an R2 Suffix) Internal reverse battery protection on V PWR Loss of ground or supply will not energize loads or damage IC MC33880PEG 28 SOICW -40C to 125C Maximum 5.0 A I standby current at 13 V V up to 95 C PWR PWR MC33880PEW 32 SOICW R of 0.55 at 25 C typical DS(ON) Short circuit detect and current limit with autoretry Independent over-temperature protection 32-pin SOICW has pins 8, 9, 24, and 25 grounded for thermal performance V V PWR S 33880 VPWR D1 5.0 V High-Side D2 D3 VDD 5.0 V D4 D5 D6 EN D7 D8 CS MOT H-Bridge S1 MCU SCLK S2 SPI I/O DI S3 DO S4 S5 IN5 S6 PWM IN6 S7 GND S8 Low-Side All Output Switches are High- or Low-Side Configurable Figure 1. 33880 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. Freescale Semiconductor, Inc., 2009-2012. All rights reserved.INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM VDD VPWR ~50 A CS Overvoltage Internal Charge Shutdown/POR Pump SCLK Bias Sleep State DI GND DO OV, POR, SLEEP SPI and EN Typical of All 8 Output Drivers Interface D1 ~50 A Logic TLIM D2 D3 SPI Bit 0 Drain Gate IN5 Open D4 Drive Outputs Load Enable Detect ~50 A Control D7 Current Current ~650 A D8 SPI Bit 4 Limit + IN5 IN6 S1 ~50 A + S2 + S3 Source Open/Short Comparator ~1.5 V Open/Short Threshold S4 Outputs S7 S8 D5 Drain TLIM Outputs Open D6 Load Detect Current Gate ~650 A Drive Control Current Limit + S5 Source + S6 Outputs + ~1.5 V Open/Short Open/Short Comparator Threshold Figure 2. 33880 Simplified Internal Block Diagram 33880 Analog Integrated Circuit Device Data 2 Freescale Semiconductor