Document Number: MC56F844XX Freescale Semiconductor Rev. 3, 06/2014 Data Sheet: Technical Data MC56F844XX MC56F844XX Supports the 56F84462VLH, 56F84452VLH, 56F84451VLF, 56F84442VLH, 56F84441VLF Features Analog This family of digital signal controllers (DSCs) is Two high-speed, 8-channel, 12-bit ADCs with based on the 32-bit 56800EX core. Each device dynamic x2, x4 programmable amplifier combines, on a single chip, the processing power of a One 20-channel, 16-bit ADC DSP and the functionality of an MCU with a flexible Up to four analog comparators with integrated 6-bit set of peripherals to support many target applications: DAC references Industrial control One 12-bit DAC Home appliances PWMs and timers Smart sensors One eFlexPWM module with up to 9 PWM outputs Fire and security systems Two 16-bit quad timer (2 x 4 16-bit timers) Switched-mode power supply and power Two Periodic Interval Timers (PITs) management One Quadrature Decoder Uninterruptible Power Supply (UPS) Two Programmable Delay Blocks (PDBs) Solar and wind power generator Power metering Communication interfaces Motor control (ACIM, BLDC, PMSM, SR, stepper) Two high-speed queued SCI (QSCI) modules with Handheld power tools LIN slave functionality Circuit breaker One queued SPI (QSPI) module Medical device/equipment Two SMBus-compatible I2C ports Instrumentation One flexible controller area network (FlexCAN) Lighting module DSC based on 32-bit 56800EX core Security and integrity Up to 60 MIPS at 60 MHz core frequency Cyclic Redundancy Check (CRC) generator DSP and MCU functionality in a unified, C-efficient Computer operating properly (COP) watchdog architecture External Watchdog Monitor (EWM) On-chip memory Clocks Up to 160 KB (128 KB + 32 KB) flash memory, Two on-chip relaxation oscillators: 8 MHz (400 kHz including up to 32 KB FlexNVM at standby mode) and 32 kHz Up to 24 KB RAM Crystal / resonator oscillator Up to 2 KB FlexRAM with EEE capability 60 MHz program execution from both internal flash System memory and RAM DMA controller On-chip flash memory and RAM can be mapped Integrated power-on reset (POR) and low-voltage into both program and data memory spaces interrupt (LVI) and brown-out reset module Inter-module crossbar connection JTAG/enhanced on-chip emulation (EOnCE) for unobtrusive, real-time debugging Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. 2014 Freescale Semiconductor, Inc.Operating characteristics Single supply: 3.0 V to 3.6 V 5 Vtolerant I/O (except RESETB pin) LQFP packages: 48-pin 64-pin MC56F844XX Data Sheet, Rev. 3, 06/2014. 2 Freescale Semiconductor, Inc.