Document Number: MCF5271EC Freescale Semiconductor Rev. 4, 08/2009 Data Sheet: Technical Data MCF5271 Integrated Microprocessor Hardware Specification by: Microcontroller Solutions Group Contents The MCF5271 family is a highly integrated implementation of the ColdFire family of reduced 1 MCF5271 Family Configurations . 2 2 Block Diagram . 2 instruction set computing (RISC) microprocessors. This 3 Features . 4 document describes pertinent features and functions of 4 Signal Descriptions . 4 5 Design Recommendations . 8 the MCF5271 family. The MCF5271 family includes the 6 Mechanicals/Pinouts and Part Numbers 12 MCF5271 and MCF5270 microprocessors. The 7 Electrical Characteristics 17 differences between these parts are summarized below in 8 Documentation . 39 9 Document Revision History 39 Table 1. This document is written from the perspective of the MCF5271 and unless otherwise noted, the information applies also to the MCF5270. The MCF5271 family combines low cost with high integration on the popular version 2 ColdFire core with over 144 (Dhrystone 2.1) MIPS at 150 MHz. Positioned for applications requiring a cost-sensitive 32-bit solution, the MCF5271 family features a 10/100 Ethernet MAC and optional hardware encryption to ensure the application can be connected and protected. In addition, the MCF5271 family features an enhanced multiply accumulate unit (eMAC), large on-chip memory (64 Kbytes SRAM, 8 Kbytes configurable cache), and a 32-bit SDR SDRAM memory controller. Freescale Semiconductor, Inc., 2009. All rights reserved.MCF5271 Family Configurations 1 MCF5271 Family Configurations Table 1. MCF5271 Family Configurations Module MCF5270 MCF5271 xx ColdFire V2 Core with EMAC and Hardware Divide 150 MHz System Clock 144 Performance (Dhrystone/2.1 MIPS) 8 Kbytes Instruction/Data Cache 64 Kbytes Static RAM (SRAM) 22 Interrupt Controllers (INTC) xx Edge Port Module (EPORT) xx External Interface Module (EIM) xx 4-channel Direct-Memory Access (DMA) xx SDRAM Controller xx Fast Ethernet Controller (FEC) x Hardware Encryption xx Watchdog Timer (WDT) xx Four Periodic Interrupt Timers (PIT) 44 32-bit DMA Timers xx QSPI 33 UART(s) 2 xx I C xx General Purpose I/O Module (GPIO) xx JTAG - IEEE 1149.1 Test Access Port 160 QFP, 160 QFP, Package 196 MAPBGA 196 MAPBGA 2 Block Diagram The superset device in the MCF5271 family comes in a 196 mold array plastic ball grid array (MAPBGA) package. Figure 1 shows a top-level block diagram of the MCF5271. MCF5271 Integrated Microprocessor Hardware Specification, Rev. 4 2 Freescale Semiconductor