Document Number: IMX53IEC NXP Semiconductors Rev. 8, 02/2021 Data Sheet: Technical Data MCIMX53xC i.MX53 Applications Package Information Plastic Package Processors for Industrial Case HW-PWR-TEPBGA-529 19 x 19 mm, 0.8 mm pitch Products Silicon Version 2.1 Ordering Information See Table 1 on page 2 1 Introduction 1 1 Introduction 1.1 Functional Part Differences and Ordering Information 1.2 Features . 3 The i.MX53 processor features ARM Cortex-A8 2 Architectural Overview . 6 2.1 Block Diagram . 6 core, which operates at clock speeds as high as 3 Modules List . 7 800 MHz. It provides DDR2/LVDDR2-800, 3.1 Special Signal Considerations 16 4 Electrical Characteristics . 16 LPDDR2-800, or DDR3-800 DRAM memories. 4.1 Chip-Level Conditions 16 4.2 Power Supply Requirements and Restrictions . 23 The flexibility of the i.MX53 architecture allows for its 4.3 I/O DC Parameters 26 use in a wide variety of applications. As the heart of the 4.4 Output Buffer Impedance Characteristics . 32 4.5 I/O AC Parameters 36 application chipset, the i.MX53 processor provides all 4.6 System Modules Timing 43 the interfaces for connecting peripherals, such as 4.7 External Peripheral Interfaces Parameters 65 WLAN, Bluetooth, GPS, hard drive, camera sensors, 4.8 XTAL Electrical Specifications . 141 4.9 Integrated LDO Voltage Regulators Parameters. 141 and dual displays. 5 Boot Mode Configuration . 142 5.1 Boot Mode Configuration Pins . 142 Features of the i.MX53 processor include the following: 5.2 Boot Devices Interfaces Allocation . 143 Applications processorThe i.MX53xD 5.3 Power Setup During Boot 144 6 Package Information and Contact Assignments 145 processors boost the capabilities of high-tier 6.1 19x19 mm Package Information . 145 portable applications by satisfying the ever 7 Revision History . 170 increasing MIPS needs of operating systems and games. Freescales Dynamic Voltage and Frequency Scaling (DVFS) provides significant power reduction, allowing the device to run at lower voltage and frequency with sufficient MIPS for tasks such as audio decode. NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products.Introduction Multilevel memory systemThe multilevel memory system of the i.MX53 is based on the L1 instruction and data caches, L2 cache, internal and external memory. The i.MX53 supports many types of external memory devices, including DDR2, low voltage DDR2, LPDDR2, DDR3, NOR Flash, PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNAND, and managed NAND including eMMC up to rev 4.4. Smart speed technologyThe i.MX53 device has power management throughout the IC that enables the rich suite of multimedia features and peripherals to consume minimum power in both active and various low power modes. Smart speed technology enables the designer to deliver a feature-rich product requiring levels of power far lower than industry expectations. Multimedia powerhouseThe multimedia performance of the i.MX53 processor ARM core is boosted by a multilevel cache system, Neon (including advanced SIMD, 32-bit single-precision floating point support) and vector floating point coprocessors. The system is further enhanced by a multi-standard hardware video codec, autonomous image processing unit (IPU), and a programmable smart DMA (SDMA) controller. Powerful graphics acceleration The i.MX53 processors provide two independent, integrated graphics processing units: an OpenGL ES 2.0 3D graphics accelerator (33 Mtri/s, 200 Mpix/s, and 800 Mpix/s z-plane performance) and an OpenVG 1.1 2D graphics accelerator (200 Mpix/s). Interface flexibilityThe i.MX53 processor supports connection to a variety of interfaces, including LCD controller for two displays and CMOS sensor interface, high-speed USB on-the-go with PHY, plus three high-speed USB hosts, multiple expansion card ports (high-speed MMC/SDIO host and others), 10/100 Ethernet controller, and a variety of other popular interfaces 2 2 (PATA, UART, I C, and I S serial audio, among others). Advanced securityThe i.MX53 processors deliver hardware-enabled security features that enable secure e-commerce, digital rights management (DRM), information encryption, secure boot, and secure software downloads. For detailed information about the i.MX53 security features contact a Freescale representative. The i.MX53 application processor is a follow-on to the i.MX51, with improved performance, power efficiency, and multimedia capabilities. 1.1 Functional Part Differences and Ordering Information shows the functional differences between the different parts in the i.MX53 family. Table 1 provides ordering information. Table 1. Ordering Information 1 Part Number Mask Set CPU Frequency Notes Package MCIMX537CVP8C2 3N78C 800 MHz 19 x 19 mm, 0.8 mm pitch BGA Case HW-PWR-TEPBGA-529 1 Case TEPBGA-529 is RoHS compliant, lead-free MSL (moisture sensitivity level) 3. i.MX53 Applications Processors for Industrial Products, Rev. 8 2 NXP Semiconductors