Document Number: MKMxxZxxACxx5 Freescale Semiconductor Rev. 1, 09/2014 Data Sheet: Advance Information MKMxxZxxACxx5 KM Family Supports the following: MKM14Z64ACHH5, MKM14Z128ACHH5, MKM33Z64ACLH5, MKM33Z128ACLH5, MKM33Z64ACLL5, MKM33Z128ACLL5, MKM34Z128ACLL5 Features Security and integrity modules Operating Characteristics Hardware programmable CRC module to support Voltage range: 1.71 V to 3.6 V (when Analog Front fast cyclic redundancy checks End (AFE) is not used) Hardware random-number generator Voltage range: 2.7 V to 3.6 V (when Analog Front 128-bit unique identification (ID) number per chip End (AFE) is used) Human-machine interface iRTC battery supply voltage range: 1.71 to 3.6 V Segment LCD controller supporting up to 36 Flash write voltage range: 1.71 to 3.6 V frontplanes and 8 backplanes or 40 frontplanes and 4 Temperature range (ambient): -40C to 85C backplanes Performance General-purpose input/output which can acts as Up to 50 MHz ARM Cortex-M0+ core delivering Rapid GPIO (single cycle access) 0.95 Dhrystone MIPS per MHz Analog modules Memories and memory interfaces 16-bit SAR ADC 128/64 KB program flash memory. There is no 24-bit Analog Front End comprising of 24-bit Sigma FlexMemory on these devices Delta ADCs (after averaging) 16 KB of single access RAM Programmable Gain Amplifier (PGA with gains upto 32) Clocks Two analog comparators (CMP) containing a 6-bit 1 to 32 MHz crystal oscillator DAC and programmable reference input 32 kHz crystal oscillator 1.2V Voltage reference Multi-purpose clock generator Timers System peripherals 4 channel Quad Timer with 16-bit counters Multiple low-power modes to provide power Periodic interrupt timers optimization based on application requirements 16-bit low-power timer Memory protection unit with multi-master Independent Real Time Clock with calendaring and protection compensation 4-channel DMA controller, supporting up to 64 request sources External watchdog monitor Robust watchdog monitor Low-leakage wakeup unit Asynchronous wakeup unit Peripheral Crossbar (allows internal signals to be connected to other on-chip modules) This document contains information on a new product. Specifications and information herein are subject to change without notice. 20112014 Freescale Semiconductor, Inc.Communication interfaces One SPI module with FIFO support (supports 5V AMR operation) One SPI module without FIFO (no AMR operation) Two I2C modules with SMBus support Two UART modules with ISO7816 support and Two UART without ISO 7816 support Any one SCI can be used for IrDA operation. 5V AMR support on one SCI. KM Family Data Sheet, Rev. 1, 09/2014. 2 Freescale Semiconductor, Inc.