PCA9846 2 4-channel ultra-low voltage, Fm+ I C-bus switch with reset Rev. 1.1 4 April 2017 Product data sheet 1. General description The PCA9846 is an ultra-low voltage, quad bidirectional translating switch controlled via 2 the I C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any or all SCx/SDx channels can be selected, determined by the programmable control 2 register. This feature allows multiple devices with the same I C-bus address to reside on 2 the same bus. The switch device can also separate a heavily loaded I C-bus into separate bus segments, eliminating the need for a bus buffer. An active LOW reset input allows the PCA9846 to recover from a situation where one of 2 the downstream I C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets 2 the I C-bus state machine and deselects all the channels, as does the internal Power-On Reset (POR) function. The pass gates of the switches are constructed such that the V pin is used to limit the DD1 maximum high voltage which is passed by the PCA9846. This allows the use of different bus voltages on each channel, so that 0.8 V, 1.8 V, 2.5 V or 3.3 V parts can communicate without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 3.6 V tolerant. 2. Features and benefits Ultra-low voltage operation, down to 0.8 V to interface with next-generation CPUs 1-of-4 bidirectional translating switch 2 Fm+ I C-bus interface logic compatible with SMBus standards Active LOW reset input 2 2 address pins allowing up to 16 devices on the I C-bus 2 Channel selection via I C-bus Power-up with all switch channels deselected Low R switches on Allows voltage level translation between 0.8 V, 1.8 V, 2.5 V and 3.3 V buses 2 Reset via I C-bus software command 2 I C Device ID function No glitch on power-up Supports hot insertion since all channels are de-selected at power-on Low standby currentPCA9846 NXP Semiconductors 2 4-channel ultra-low voltage, Fm+ I C-bus switch with reset 3.6 V tolerant inputs 0 Hz to 1 MHz clock frequency ESD protection exceeds 6000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Two packages offered: TSSOP16 and HVQFN16 3. Ordering information Table 1. Ordering information Type number Topside Package marking Name Description Version 1 PCA9846BS 846 HVQFN16 plastic thermal enhanced very thin quad flat package SOT629-1 no leads 16 terminals body 4 4 0.85 mm PCA9846PW PCA9846 TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 1 Package is in development. Contact NXP for availability. 3.1 Ordering options Table 2. Ordering options Type number Orderable Package Packing method Minimum Temperature range part number order quantity 1 PCA9846BS PCA9846BSJ HVQFN16 Reel 13 Q1/T1 6000 T = 40 Cto +85 C amb *Standard mark SMD PCA9846PW PCA9846PWJ TSSOP16 Reel 13 Q1/T1 2500 T = 40 Cto +85 C amb *Standard mark SMD PCA9846PW PCA9846PWZ TSSOP16 Reel 13 Q1/T1 500 T = 40 Cto +85 C amb *Standard mark SMD 1 Package is in development. Contact NXP for availability. PCA9846 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2017. All rights reserved. Product data sheet Rev. 1.1 4 April 2017 2 of 32