PCF8582C-2 2 256 8-bit CMOS EEPROM with I C-bus interface Rev. 04 25 October 2004 Product data 1. Description The PCF8582C-2 is a oating gate Electrically Erasable Programmable Read Only Memory (EEPROM) with 2 kbits (256 8-bit) non-volatile storage. By using an internal redundant storage code, it is fault tolerant to single bit errors. This feature dramatically increases the reliability compared to conventional EEPROMs. Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier. 2 Data bytes are received and transmitted via the serial I C-bus. Up to eight 2 PCF8582C-2 devices may be connected to the I C-bus. Chip select is accomplished by three address inputs (A0, A1 and A2). Timing of the E/W cycle is carried out internally, thus no external components are required. Programming Time Control (PTC), Pin 7, must be connected to either V DD or left open-circuit. There is an option of using an external clock for timing the length of an E/W cycle. 2. Features Low power CMOS: 2.0 mA maximum operating current maximum standby current 10 A (at 6.0 V), typical 4 A Non-volatile storage of 2 kbits organized as 256 8-bit Single supply with full operation down to 2.5 V On-chip voltage multiplier 2 Serial input/output I C-bus Write operations: byte write mode 8-byte page write mode (minimizes total write time per byte) Read operations: sequential read random read Internal timer for writing (no external components) Internal power-on reset 0 kHz to 100 kHz clock frequency High reliability by using a redundant storage code Endurance: 1,000,000 Erase/Write (E/W) cycles at T =22 C amb 10 years non-volatile data retention timePCF8582C-2 Philips Semiconductors 2 256 8-bit CMOS EEPROM with I C-bus interface Pin and address compatible to: PCF8570, PCF8571, PCF8572, PCA8581 and PCF85102 Pin compatible with a different address to PCF85103 ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Offered in DIP8 and SO8 packages. 3. Quick reference data Table 1: Quick reference data Symbol Parameter Conditions Min Typ Max Unit supply voltage 2.5 - 6.0 V V DD supply current read f = 100 kHz I DDR SCL = 2.5 V - - 60 A V DD =6V - - 200 A V DD supply current E/W f = 100 kHz I DDW SCL = 2.5 V - - 0.6 mA V DD = 6 V - - 2.0 mA V DD standby supply current V = 2.5 V - - 3.5 A I DD(stb) DD =6V - - 10 A V DD 4. Ordering information Table 2: Ordering information Type number Package Name Description Version PCF8582C-2P/03 DIP8 plastic dual in-line package 8 leads (300 mil) SOT97-1 PCF8582C-2T/03 SO8 plastic small outline package 8 leads (straight) SOT96-1 body width 3.9 mm 4.1 Ordering options Table 3: Ordering options Type number Topside mark PCF8582C-2P/03 PCF8582C-2 PCF8582C-2T/03 8582C-2 9397 750 14222 Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 04 25 October 2004 2 of 21