PDTA114EMB NXP

PDTA114EMB PNP resistor-equipped transistor R1 = 10 k, R2 = 10 k Rev. 1 15 May 2012 Product data sheet 1. Product profile 1.1 General description PNP Resistor-Equipped Transistor (RET) in a leadless ultra small DFN1006B-3 (SOT883B) Surface-Mounted Device (SMD) plastic package. NPN complement: PDTC114EMB 1.2 Features and benefits 100 mA output current capability Simplifies circuit design Reduces component count AEC-Q101 qualified Built-in bias transistors Leadless ultra small SMD plastic package Reduces pick and place costs Low package height of 0.37 mm 1.3 Applications Low-current peripheral driver Replaces general-purpose transistors in digital applications Control of IC inputs Mobile applications 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit collector-emitter open base - - -50 V V CEO voltage I output current - - -100 mA O R1 bias resistor 1 (input) T = 25 C 7 10 13 k amb R2/R1 bias resistor ratio 0.8 1 1.2 SOT883BPDTA114EMB NXP Semiconductors PNP resistor-equipped transistor R1 = 10 k , R2 = 10 k 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1 I input (base) 1 3 2 G GND (emitter) 3 R1 1 3 O output (collector) 2 Transparent R2 top view 2 SOT883B (DFN1006B-3) sym003 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PDTA114EMB DFN1006B-3 Leadless ultra small plastic package 3 solder lands SOT883B body 1.0 x 0.6 x 0.37 mm 4. Marking Table 4. Marking codes Type number Marking code PDTA114EMB 0001 1001 PIN 1 INDICATION READING DIRECTION READING EXAMPLE: 0111 1011 MARKING CODE (EXAMPLE) READING DIRECTION 006aac673 Fig 1. DFN1006B-3 (SOT883B) binary marking code description PDTA114EMB All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 1 15 May 2012 2 of 11