SC16C754B 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs Rev. 04 6 October 2008 Product data sheet 1. General description The SC16C754B is a quad Universal Asynchronous Receiver/Transmitter (UART) with 64-byte FIFOs, automatic hardware/software ow control, and data rates up to 5 Mbit/s (3.3 V and 5 V). The SC16C754B offers enhanced features. It has a Transmission Control Register (TCR) that stores receiver FIFO threshold levels to start/stop transmission during hardware and software ow control. With the FIFO Ready (FIFO Rdy) register, the software gets the status of TXRDY/RXRDY for all four ports in one access. On-chip status registers provide the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loopback capability allows on-board diagnostics. The UART transmits data, sent to it over the peripheral 8-bit bus, on the TX signal and receives characters on the RX signal. Characters can be programmed to be 5, 6, 7, or 8 bits. The UART has a 64-byte receive FIFO and transmit FIFO and can be programmed to interrupt at different trigger levels. The UART generates its own desired baud rate based upon a programmable divisor and its input clock. It can transmit even, odd, or no parity and 1, 1.5, or 2 stop bits. The receiver can detect break, idle, or framing errors, FIFO overow, and parity errors. The transmitter can detect FIFO underow. The UART also contains a software interface for modem control operations, and has software ow control and hardware ow control capabilities. The SC16C754B is available in plastic LQFP64, LQFP80 and PLCC68 packages. 2. Features n 4 channel UART n 5 V, 3.3 V and 2.5 V operation n Pin compatible with SC16C654IA68, TL16C754, and SC16C554IA68 with additional enhancements, and software compatible with TL16C754 n Up to 5 Mbit/s data rate (at 3.3 V and 5 V at 2.5 V maximum data rate is 3 Mbit/s) 1 n 5 V tolerant on input only pins n 64-byte transmit FIFO n 64-byte receive FIFO with error ags n Industrial temperature range (- 40 C to +85 C) n Programmable and selectable transmit and receive FIFO trigger levels for DMA and interrupt generation 1. For data bus pins D7 to D0, see Table 24 Limiting values.SC16C754B NXP Semiconductors 5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs n Software (Xon/Xoff)/hardware (RTS/CTS) ow control u Programmable Xon/Xoff characters u Programmable auto-RTS and auto-CTS n Optional data ow resume by Xon any character n DMA signalling capability for both received and transmitted data n Supports 5 V, 3.3 V and 2.5 V operation n Software selectable baud rate generator n Prescaler provides additional divide-by-4 function n Fast data bus access time n Programmable Sleep mode n Programmable serial interface characteristics u 5, 6, 7, or 8-bit characters u Even, odd, or no-parity bit generation and detection u 1, 1.5, or 2 stop bit generation n False start bit detection n Complete status reporting capabilities in both normal and Sleep mode n Line break generation and detection n Internal test and loopback capabilities n Fully prioritized interrupt system controls n Modem control functions (CTS, RTS, DSR, DTR, RI, and CD) n Sleep mode 3. Ordering information Table 1. Ordering information Type number Package Name Description Version SC16C754BIBM LQFP64 plastic low prole quad at package 64 leads body 7 7 1.4 mm SOT414-1 SC16C754BIB80 LQFP80 plastic low prole quad at package 80 leads body 12 12 1.4 mm SOT315-1 SC16C754BIA68 PLCC68 plastic leaded chip carrier 68 leads SOT188-2 SC16C754B 4 NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 6 October 2008 2 of 51