SC28L198A1BE,557 NXP

INTEGRATED CIRCUITS SC28L198 Octal UART for 3.3 V and 5 V supply voltage Product data sheet 2006 Aug 10 Supersedes data of 1999 Jan 14 Philips Semiconductors Product data sheet Octal UART for 3.3 V and 5 V supply voltage SC28L198 Table of Contents Register Map Summary . 31 Description 2 Register Map Detail 32 Uses 3 Reset Conditions . 41 Features . 3 Device Configuration after Hardware Reset or CRa cmd=x1F 41 Cleared registers: . 41 Pin Configurations . 4 Clears Modes for: . 41 Pinout . 4 Disables: 41 Pin Description . 6 Halts: . 41 Absolute Maximum Ratings . 6 Limitations: 41 Block Diagram . 7 DC Electrical Specifications (5V) 42 Functional Description . 7 AC Electrical Characteristic (5V) 43 Conceptual Overview . 7 DC Electrical Specifications (3.3V) 45 Host Interface 7 AC Electrical Characteristics (3.3V) 46 Asynchronous bus cycle . 7 INDEX . 52 Synchronous bus cycle 7 Timing Circuits . 7 Crystal Oscillator 8 Sclk System Clock . 8 DESCRIPTION Baud Rate Generator BRG 8 The Philips 28L198 Octal UART is a single chip CMOSLSI BRG Counters (Used for random baud rate generation) 8 communications device that provides 8 full-duplex asynchronous Channel Blocks . 8 channels with significantly deeper 16 byte FIFOs, Automatic Character Recognition . 8 Interrupt Control 9 inband flow control using Xon/Xoff characters defined by the user Global Registers 9 and address recognition in the wake up mode. Synchronous bus I/O Ports . 9 interface is used for all communication between host and OCTART. Detailed Descriptions . 9 It is fabricated using Philips 1.0 micron CMOS technology that combines the benefits of low cost, high density and low power Receiver and Transmitter . 9 consumption. Transmitter 9 Status Bits . 9 The operating speed of each receiver and transmitter can be Transmission of break 10 selected independently from one of 22 fixed baud rates, a 16X clock 1x and 16x modes, Transmitter . 10 derived from one of two programmable baud rate counters or one of Transmitter FIFO 10 three external 16X clocks (1 available at 1x clock rate). The baud Receiver 10 1x and 16x mode, Receiver . 10 rate generator and counter can operate directly from a crystal or Receiver Status Bits . 10 from seven other external or internal clock inputs. The ability to Receiver FIFO 11 independently program the operating speed of the receiver and RxFIFO Status: Status reporting modes 11 transmitter makes the Octal UART particularly attractive for dual I/O ports . 12 speed full duplex channel applications such as clustered terminal General Purpose Pins . 9 systems. The receivers and transmitters are buffered with FIFOs of Global Registers 8 16 characters to minimize the potential for receiver overrun and to Character Recognition . 8 reduce interrupt overhead. In addition, a handshaking capability and Xon Xoff Characters . 12 inband flow control are provided to disable a remote UART Multi-drop or Wake up or 9 bit mode . 12 transmitter when the receiver buffer is full or nearly so. Character Stripping 12 Interrupt Arbitration and IRQN generation 12 To minimize interrupt overhead an interrupt arbitration system is IACKN Cycle, Update CIR 13 included which reports the context of the interrupting UART via Polling . 13 direct access or through the modification of the interrupt vector. The Enabling and Activating Interrupt sources . 13 context of the interrupt is reported as channel number, type of Setting Interrupt Priorities 13 device interrupting (receiver COS etc.) and, for transmitters or Modes of Operation 14 receivers, the fill level of the FIFO. Major Modes . 14 Minor Modes . 15 The Octal UART provides a power down mode in which the Watch-dog Timer Timeout Mode . 15 oscillator is stopped but the register contents are maintained. This Wake Up Mode . 15 results in reduced power consumption of several orders of Xon/Xoff Operation 18 magnitudes. The Octal UART is fully TTL compatible when REGISTER DEFINITIONS 18 operating from a single +5V power supply. Operation at 3.3 volts is MR Mode Registers . 18 maintained with CMOS interface levels. UCIR Update CIR . 13 General Purpose Output Pin Control 30 The device also offered in a version which maintains TTL input and Register Maps . 31 output levels while operating with a 3.3 volt power supply. 2 2006 Aug 10