SCC68692E1A44,512 NXP

INTEGRATED CIRCUITS SCC68692 Dual asynchronous receiver/transmitter (DUART) Product data 2004 Mar 03 Supersedes data of 1998 Sep 04 Philips Semiconductors Product data Dual asynchronous receiver/transmitter (DUART) SCC68692 DESCRIPTION Parity, framing, and overrun error detection The Philips Semiconductors SCC68692 Dual Universal False start bit detection Asynchronous Receiver/Transmitter (DUART) is compatible with SCN68681. It is a single-chip CMOS-LSI communications device Line break detection and generation that provides two full-duplex asynchronous receiver/transmitter Programmable channel mode channels in a single package. It is compatible with other S68000 family devices and can also interface easily with other Normal (full-duplex) microprocessors. The DUART can be used in a polled or interrupt Automatic echo driven systems. Local loopback The operating mode and data format of each channel can be Remote loopback programmed independently. Additionally, each receiver and Multidrop mode (also called wake-up or 9-bit) transmitter can select its operating speed as one of eighteen fixed Multi-function 6-bit input port baud rates, a 16X clock derived from a programmable counter/timer, or an external 1X or 16X clock. The baud rate generator and Can serve as clock or control inputs counter/timer can operate directly from a crystal or from external Change of state detection on four inputs clock inputs. The ability to independently program the operating Inputs have typically >100 k pull-up resistors speed of the receiver and transmitter make the DUART particularly attractive for dual-speed channel applications such as clustered Multi-function 8-bit output port terminal systems. Individual bit set/reset capability Each receiver is quadruple buffered to minimize the potential of Outputs can be programmed to be status/interrupt signals receiver over-run or to reduce interrupt overhead in interrupt driven Versatile interrupt system systems. In addition, a flow control capability is provided to disable a Single interrupt output with eight maskable interrupting remote DUART transmitter when the receiver buffer is full. conditions Also provided on the SCC68692 are a multipurpose 6-bit input port Interrupt vector output on interrupt acknowledge and a multipurpose 8-bit output port. These can be used as general Output port can be configured to provide a total of up to six purpose I/O ports or can be assigned specific functions (such as separate wire-ORable interrupt outputs clock inputs or status/interrupt outputs) under program control. Maximum data transfer rates: 1X 1 MB/sec, 16X 125 kB/sec FEATURES Automatic wake-up mode for multidrop applications S68000 bus compatible Start-end break interrupt/status Dual full-duplex asynchronous receiver/transmitters Detects break which originates in the middle of a character Quadruple buffered receiver data register On-chip crystal oscillator Programmable data format: Power down mode 5 to 8 data bits plus parity Receiver timeout mode Odd, even, no parity or force parity Commercial and Industrial temperature range versions 1, 1.5 or 2 stop bits programmable in 1/16-bit increments 16-bit programmable Counter/Timer TTL compatible Single +5 V power supply Programmable baud rate for each receiver and transmitter selectable from: 22 fixed rates: 50 to 115.2 k baud Non-standard rates to 115.2 kb Non-standard user-defined rate derived from programmable counter/timer External 1X or 16X clock ORDERING INFORMATION COMMERCIAL INDUSTRIAL DESCRIPTION DWG V = +5 V 10 %, V = +5 V 10 %, CC CC T = 0 to +70 C T = 40 to +85 C amb amb 40-Pin (600 mils wide) Plastic Dual In-Line Package (DIP) SCC68692C1N40 SCC68692E1N40 SOT129-1 44-Pin Plastic Leaded Chip Carrier (PLCC) SCC68692C1A44 SCC68692E1A44 SOT187-2 2004 Mar 03 2