NXP Semiconductors Document Number: MPC5510 Rev. 5, 7/2019 Data Sheet: Technical Data MPC5510 LQFP144 MAPMAPBGA225BGA208 QFN12 20 mm x 20 mm 1715mmmmxx1175mmmm mm x mm LQFP176 24 mm x 24 mm MPC5510 Microcontroller SOT-343R PKG-TBD mm x mm mm x mm TBD Family Data Sheet MPC5510 Family Features Up to 144 configurable general purpose pins supporting input and output operations and 3.0V through 5.5V supply Single issue, 32-bit CPU core complex (e200z1) levels Compliant with the Power Architecture embedded Real-time counter (RTC API) with clock source from category external 32-kHz crystal oscillator, internal 32-kHz or Includes an instruction set enhancement allowing 16-MHz oscillator and supporting wake-up with selectable variable length encoding (VLE) for code size footprint 1-second resolution and > 1-hour timeout, or 1-millisecond reduction. With the optional encoding of mixed 16-bit resolution with maximum timeout of one second and 32-bit instructions, it is possible to achieve Up to eight periodic interrupt timers (PIT) with 32-bit significant code size footprint reduction. counter resolution Up to 1.5-Mbyte on-chip flash with flash control unit Nexus development interface (NDI) per IEEE-ISTO (FCU) 5001-2003 Class Two Plus standard Up to 80 Kbytes on-chip SRAM Device/board test support per Joint Test Action Group Memory protection unit (MPU) with up to sixteen region (JTAG) of IEEE (IEEE 1149.1) descriptors and 32-byte region granularity On-chip voltage regulator (VREG) for regulation of 5V Interrupt controller (INTC) capable of handling input to 1.5V and 3.3V internal supply levels selectable-priority interrupt sources Optional e200z0, second Power Architecture based I/O Frequency modulated Phase-locked loop (FMPLL) processor with VLE instruction set Crossbar switch architecture for concurrent access to Optional FlexRAY controller peripherals, flash, or RAM from multiple bus masters Optional external bus interface (EBI) module 16-channel enhanced direct memory access controller (eDMA) Boot assist module (BAM) supports internal flash programming via a serial link (CAN or SCI) Timer supports input/output channels providing a range of 16-bit input capture, output compare, and pulse width modulation functions (eMIOS200) Up to 40-channel 12-bit analog-to-digital converter (ADC) Up to four serial peripheral interface (DSPI) modules Media Local Bus (MLB) emulation logic (works with two DSPIs, the e200z0, the eDMA, and system RAM to create a 3-pin or 5-pin 256Fs MLB protocol) Up to eight serial communication interface (eSCI) modules Up to six enhanced full CAN (FlexCAN) modules with configurable buffers 2 One inter IC communication interface (I C) module This document contains information on a product under development. NXP reserves the right to change or discontinue this product without notice.Table of Contents 1 Pin Assignments and Reset States .4 Table 13. 5V Low Frequency (32 kHz) Internal RC Oscillator . 32 1.1 Signal Properties and Multiplexing Summary .4 Table 14. FMPLL Electrical Specifications . 33 1.2 Power and Ground Supply Summary 15 Table 15. eQADC Conversion Specifications (Operating) 34 1.3 Pinout 144 LQFP 17 Table 16. Flash Program and Erase Specifications . 35 1.4 Pinout 176 LQFP 18 Table 17. Flash EEPROM Module Life (Full Temperature Range) 35 1.5 Pinout 208 PBGA 19 Table 18. Pad AC Specifications (VDDE = 3.0V - 5.5V) . 36 2 Electrical Characteristics 20 Table 19. Reset and Boot Configuration Timing . 37 2.1 Maximum Ratings .20 Table 20. IRQ/NMI Timing 37 2.2 Thermal Characteristics 21 Table 21. JTAG Interface Timing . 38 2.2.1 General Notes for Specifications at Maximum Table 22. Nexus Debug Port Timing 41 Junction Temperature 21 Table 23. External Bus Operation Timing 43 2.3 ESD Characteristics .24 Table 24. eMIOS Timing . 46 2.4 DC Electrical Specifications .25 Table 25. DSPI Timing . 47 2.5 Operating Current Specifications 27 Table 26. Package Information 52 2.6 I/O Pad Current Specifications .29 Table 27. Revision History of MPC5510 Data Sheet 53 2.7 Low Voltage Characteristics .30 List of Figures 2.8 Oscillators Electrical Characteristics .31 Figure 1. MPC5510 Family Block Diagram 3 2.9 FMPLL Electrical Characteristics .33 Figure 2. MPC5510 Pinout 144 LQFP . 17 2.10 eQADC Electrical Characteristics .34 Figure 3. MPC5510 Pinout 176 LQFP . 18 2.11 Flash Memory Electrical Characteristics 35 Figure 4. MPC5510 Pinout 208 PBGA . 19 2.12 Pad AC Specifications 36 Figure 5. Pad Output Delay . 36 2.13 AC Timing .37 Figure 6. Reset and Boot Configuration Timing 37 2.13.1 Reset and Boot Configuration Pins 37 Figure 7. IRQ and NMI Timing . 37 2.13.2 External Interrupt (IRQ) and Non-Maskable Figure 8. JTAG Test Clock Input Timing 38 Interrupt (NMI) Pins .37 Figure 9. JTAG Test Access Port Timing . 39 2.13.3 JTAG (IEEE 1149.1) Interface 38 Figure 10. JTAG JCOMP Timing . 39 2.13.4 Nexus Debug Interface .41 Figure 11. JTAG Boundary Scan Timing . 40 2.13.5 External Bus Interface (EBI) .43 Figure 12. Nexus Output Timing . 41 2.13.6 Enhanced Modular I/O Subsystem (eMIOS) .46 Figure 13. Nexus TDI, TMS, TDO Timing 42 2.13.7 Deserial Serial Peripheral Interface (DSPI) 47 Figure 14. CLKOUT Timing . 43 3 Package Information 52 Figure 15. Synchronous Output Timing 44 4 Product Documentation .52 Figure 16. Synchronous Input Timing . 45 4.1 Revision History 53 Figure 17. Address Latch Enable (ALE) Timing . 46 List of Tables Figure 18. DSPI Classic SPI Timing Master, CPHA = 0 . 48 Table 1. MPC5510 Signal Properties .4 Figure 19. DSPI Classic SPI Timing Master, CPHA = 1 . 48 Table 2. MPC5510 Power/Ground 15 Figure 20. DSPI Classic SPI Timing Slave, CPHA = 0 49 Table 3. Absolute Maximum Ratings .20 Figure 21. DSPI Classic SPI Timing Slave, CPHA = 1 49 Table 4. Thermal Characteristics 21 Figure 22. DSPI Modified Transfer Format Timing Master, Table 5. ESD Ratings, .24 CPHA = 0 50 Table 6. DC Electrical Specifications .25 Figure 23. DSPI Modified Transfer Format Timing Master, Table 7. Operating Currents .27 CPHA = 1 50 Table 8. I/O Pad Average DC Current 29 Figure 24. DSPI Modified Transfer Format Timing Slave, CPHA = 0 Table 9. Low Voltage Monitors .30 51 Table 10. 3.3V High Frequency External Oscillator 31 Figure 25. DSPI Modified Transfer Format Timing Slave, CPHA = 1 Table 11. 5V Low Frequency (32 kHz) External Oscillator 31 51 Table 12. 5V High Frequency (16 MHz) Internal RC Oscillator .32 Figure 26. DSPI PCS Strobe (PCSS) Timing . 51 MPC5510 Microcontroller Family Data Sheet, Rev. 5 2 NXP Semiconductors