Freescale Semiconductor
Document Number: MPC5607B
Rev. 8, 04/2014
Data Sheet: Technical Data
MPC5607B
144 LQFP
100 LQFP
20 mm x 20 mm
14 mm x 14 mm
176 LQFP 208 MAPBGA
MPC5607B Microcontroller
24 mm x 24 mm 17 mm x 17 mm
Data Sheet
Up to 6 serial peripheral interface (DSPI) modules
Single issue, 32-bit CPU core complex (e200z0h)
Up to 10 serial communication interface (LINFlex)
Compliant with the Power Architecture
modules
technology embedded category
Up to 6 enhanced full CAN (FlexCAN) modules
Enhanced instruction set allowing variable
with configurable buffers
length encoding (VLE) for code size footprint
2
reduction. With the optional encoding of mixed
1 inter-integrated circuit (I C) interface module
16-bit and 32-bit instructions, it is possible to
Up to 149 configurable general purpose pins
achieve significant code size footprint
supporting input and output operations (package
reduction.
dependent)
Up to 1.5 MB on-chip code flash memory supported
Real-Time Counter (RTC)
with the flash memory controller
Clock source from internal 128 kHz or 16 MHz
64 (4 16) KB on-chip data flash memory with ECC
oscillator supporting autonomous wakeup with
Up to 96 KB on-chip SRAM
1 ms resolution with maximum timeout of 2
seconds
Memory protection unit (MPU) with 8 region
descriptors and 32-byte region granularity on certain
Optional support for RTC with clock source
family members (Refer to Table 1 for details.)
from external 32 kHz crystal oscillator,
supporting wakeup with 1 sec resolution and
Interrupt controller (INTC) capable of handling 204
maximum timeout of 1 hour
selectable-priority interrupt sources
Up to 8 periodic interrupt timers (PIT) with 32-bit
Frequency modulated phase-locked loop (FMPLL)
counter resolution
Crossbar switch architecture for concurrent access to
Nexus development interface (NDI) per IEEE-ISTO
peripherals, Flash, or RAM from multiple bus
5001-2003 Class Two Plus
masters
Device/board boundary scan testing supported per
16-channel eDMA controller with multiple transfer
Joint Test Action Group (JTAG) of IEEE (IEEE
request sources using DMA multiplexer
1149.1)
Boot assist module (BAM) supports internal Flash
On-chip voltage regulator (VREG) for regulation of
programming via a serial link (CAN or SCI)
input supply for all internal levels
Timer supports I/O channels providing a range of
16-bit input capture, output compare, and pulse
width modulation functions (eMIOS)
2 analog-to-digital converters (ADC): one 10-bit and
one 12-bit
Cross Trigger Unit to enable synchronization of
ADC conversions with a timer event from the
eMIOS or PIT
Freescale Semiconductor, Inc., 2010-2014. All rights reserved.Table of Contents
1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 4.9 Power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
1.1 Document overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 4.10 Flash memory electrical characteristics . . . . . . . . . . . 62
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 4.10.1 Program/erase characteristics . . . . . . . . . . . . . 62
2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 4.10.2 Flash power supply DC characteristics . . . . . . 63
3 Package pinouts and signal descriptions . . . . . . . . . . . . . . . . .8 4.10.3 Start-up/Switch-off timings . . . . . . . . . . . . . . . . 64
3.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.11 Electromagnetic compatibility (EMC) characteristics. . 64
3.2 . . . . . . . . . . . . Pad configuration during reset phases12 4.11.1Designing hardened software to avoid noise
3.3 Pad configuration during standby mode exit . . . . . . . . .13 problems. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
3.4 Voltage supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 4.11.2 Electromagnetic interference (EMI) . . . . . . . . . 65
3.5 Pad types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 4.11.3 Absolute maximum ratings (electrical sensitivity)65
3.6 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 4.12 Fast external crystal oscillator (4 to 16 MHz) electrical
3.7 Functional port pins . . . . . . . . . . . . . . . . . . . . . . . . . . .15 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.8 Nexus 2+ pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 4.13 Slow external crystal oscillator (32 kHz) electrical
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.1 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . .35 4.14 FMPLL electrical characteristics . . . . . . . . . . . . . . . . . 71
4.2 NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 4.15 Fast internal RC oscillator (16MHz) electrical
4.2.1 NVUSRO[PAD3V5V] field description . . . . . . . .35 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.2.2 NVUSRO[OSCILLATOR_MARGIN] field description 4.16 Slow internal RC oscillator (128kHz) electrical
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4.2.3 NVUSRO[WATCHDOG_EN] field description . .36 4.17 ADC electrical characteristics . . . . . . . . . . . . . . . . . . . 74
4.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .36 4.17.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4.4 Recommended operating conditions . . . . . . . . . . . . . .37 4.17.2 Input impedance and ADC accuracy . . . . . . . . 75
4.5 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . .40 4.17.3 ADC electrical characteristics . . . . . . . . . . . . . 80
4.5.1 External ballast resistor recommendations . . . .40 4.18 On-chip peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.5.2 Package thermal characteristics . . . . . . . . . . . .40 4.18.1 Current consumption . . . . . . . . . . . . . . . . . . . . 85
4.5.3 Power considerations. . . . . . . . . . . . . . . . . . . . .41 4.18.2 DSPI characteristics. . . . . . . . . . . . . . . . . . . . . 87
4.6 I/O pad electrical characteristics. . . . . . . . . . . . . . . . . .42 4.18.3 Nexus characteristics . . . . . . . . . . . . . . . . . . . . 93
4.6.1 I/O pad types . . . . . . . . . . . . . . . . . . . . . . . . . . .42 4.18.4 JTAG characteristics. . . . . . . . . . . . . . . . . . . . . 94
4.6.2 I/O input DC characteristics. . . . . . . . . . . . . . . .42 5 Package characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
4.6.3 I/O output DC characteristics. . . . . . . . . . . . . . .43 5.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . 96
4.6.4 Output pin transition times. . . . . . . . . . . . . . . . .46 5.1.1 176 LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
4.6.5 I/O pad current specification . . . . . . . . . . . . . . .46 5.1.2 144 LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4.7 RESET electrical characteristics. . . . . . . . . . . . . . . . . .54 5.1.3 100 LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
4.8 Power management electrical characteristics. . . . . . . .57 5.1.4 208 MAPBGA. . . . . . . . . . . . . . . . . . . . . . . . . 105
4.8.1 Voltage regulator electrical characteristics . . . .57 6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
4.8.2 Low voltage detector electrical characteristics .59 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
MPC5607B Microcontroller Data Sheet, Rev. 8
2 Freescale Semiconductor