TJA1029 ISO 17987/LIN 2.x/SAE J2602 transceiver with TXD dominant timeout Rev. 3 18 December 2018 Product data sheet 1. General description The TJA1029 is the interface between the Local Interconnect Network (LIN) master/slave protocol controller and the physical bus in a LIN network. It is primarily intended for in-vehicle subnetworks using baud rates up to 20 kBd and is compliant with LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A, SAE J2602 and ISO 17987-4:2016 (12 V). The TJA1029 is pin-compatible with the TJA1020, TJA1021, TJA1022, TJA1027 and MC33662(B). The protocol controller generates the transmit data stream. The TJA1029 converts the data stream into an optimized bus signal shaped to minimize ElectroMagnetic Emissions (EME). The LIN bus output pin is pulled HIGH via an internal termination resistor. For a master application, connect an external resistor in series with a diode between pin V BAT and pin LIN. The receiver detects a receive data stream on the LIN bus input pin and transfers it via pin RXD to the microcontroller. Power consumption is very low in Sleep mode. However, the TJA1029 can still be woken up via pins LIN and SLP N. An integrated TXD dominant time-out function prevents the bus being driven to a permanent dominant state. 2. Features and benefits 2.1 General LIN 2.x/ISO 17987-4:2016 (12 V)/SAE J2602 compliant Baud rate up to 20 kBd Very low ElectroMagnetic Emissions (EME) Very low current consumption in Sleep mode with remote LIN wake-up Input levels compatible with 3.3 V and 5 V devices Integrated termination resistor for LIN slave applications Passive behavior in unpowered state Operational during cranking pulse: full operation from 5 V upwards Undervoltage detection K-line compatible Available in SO8 and HVSON8 packages Leadless HVSON8 package (3.0 mm 3.0 mm) with low thermal resistance supporting Automated Optical Inspection (AOI) capability Dark green product (halogen free and Restriction of Hazardous Substances (RoHS) compliant) Pin-compatible subset of the TJA1020, TJA1021, TJA1022 and MC33662(B) Pin- and footprint-compatible with the TJA1027TJA1029 NXP Semiconductors ISO 17987/LIN 2.x/SAE J2602 transceiver with TXD dominant timeout 2.2 Protection Very high ElectroMagnetic Immunity (EMI) Very high ESD robustness: 8 kV according to IEC 61000-4-2 for pins LIN and V BAT Bus terminal and battery pin protected against transients in the automotive environment (ISO 7637) Bus terminal short-circuit proof to battery and ground Thermally protected Initial TXD dominant check when switching to Normal mode TXD dominant time-out function 3. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V battery supply voltage limiting values 0.3 - +42 V BAT operating range 5 - 18 V I battery supply current Sleep mode V = V V = 0 V 2.5 7 10 A BAT LIN BAT SLP N Standby mode V = V V = 0 V 2.5 7 10 A LIN BAT SLP N Normal mode V = V V = 5 V 200 800 1600 A LIN BAT SLP N V =5 V TXD V voltage on pin LIN limiting value with respect to GND and 42 - +42 V LIN V BAT V electrostatic discharge voltage on pin LIN according to IEC 61000-4-2 8- +8 kV ESD T virtual junction temperature limiting value 40 - +150 C vj 4. Ordering information Table 2. Ordering information Type number Package Name Description Version TJA1029T SO8 plastic small outline package 8 leads body width 3.9 mm SOT96-1 TJA1029TK HVSON8 plastic thermal enhanced very thin small outline package no leads SOT782-1 8 terminals body 3 3 0.85 mm TJA1029 All information provided in this document is subject to legal disclaimers. NXP B.V. 2018. All rights reserved. Product data sheet Rev. 3 18 December 2018 2 of 24